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    Switch circuit, mixer, and electronic device
    1.
    发明授权
    Switch circuit, mixer, and electronic device 有权

    公开(公告)号：US12113481B2

    公开(公告)日：2024-10-08

    申请号：US17514564

    申请日：2021-10-29

    申请人： Huawei Technologies Co., Ltd.

    发明人： Yongli Zhou ,  Xiangju Jin ,  Yan Lai

    IPC分类号： H03D7/14 ,  H01L21/52 ,  H01L27/02 ,  H01L27/105

    CPC分类号： H03D7/1441 ,  H01L21/52 ,  H01L27/0207 ,  H01L27/105 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1491 ,  H03D2200/0088

    摘要： A switch circuit, a mixer, and an electronic device, where the switch circuit includes a first metal oxide semiconductor (MOS) transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, both a gate of the first MOS transistor and a gate of the fourth MOS transistor are connected to a first port, and both a gate of the second MOS transistor and a gate of the third MOS transistor are connected to a second port; and a lead between the gate of the first MOS transistor and the first port, a lead between the gate of the second MOS transistor and the second port, a lead between the gate of the third MOS transistor and the second port, and a lead between the gate of the fourth MOS transistor and the first port all have an equal length. In this way, linearity is relatively high.

    Semiconductor Device
    4.
    发明公开
    Semiconductor Device 审中-公开

    公开(公告)号：US20230188094A1

    公开(公告)日：2023-06-15

    申请号：US17923653

    申请日：2021-05-07

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Yuto YAKUBO ,  Shoki MIYATA ,  Akio SUZUKI ,  Takayuki IKEDA

    IPC分类号： H03D7/14

    CPC分类号： H03D7/1458 ,  H01L29/78648

    摘要： A novel semiconductor device is provided. The semiconductor device includes a mixer circuit and a bias circuit. The mixer circuit includes a voltage-to-current conversion portion, a current switch portion, and a current-to-voltage conversion portion. The bias circuit includes a bias supply portion and a first transistor. The voltage-to-current conversion portion includes a second transistor and a third transistor. The bias supply portion has a function of outputting a bias voltage to be supplied to a gate of the second transistor and a gate of the third transistor. One of a source and a drain of the first transistor is electrically connected to the gate of the second transistor and the gate of the third transistor. The first transistor is turned off when the bias voltage is supplied, and the first transistor is turned on when the supply of the bias voltage is stopped.

    Passive mixer with reduced second order intermodulation
    7.
    发明授权
    Passive mixer with reduced second order intermodulation 有权

    公开(公告)号：US09825590B2

    公开(公告)日：2017-11-21

    申请号：US13503168

    申请日：2009-10-23

    申请人： Sven Mattisson ,  Pietro Andreani ,  Daniele Mastantuono

    发明人： Sven Mattisson ,  Pietro Andreani ,  Daniele Mastantuono

    IPC分类号： H03D1/04 ,  H03D7/12 ,  H03D7/14 ,  H03D7/16

    CPC分类号： H03D1/04 ,  H03D7/12 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0088

    摘要： The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component 220 for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component 231 having a first terminal 232 for receiving the first signal, a second terminal 234 for outputting the second signal, and a third terminal 236 for receiving the first cancellation signal, wherein the mixing component 231 is adapted to provide the second signal as output at the second terminal 234 by mixing the first signal provided as input at the first terminal 232 and the first cancellation signal provided as input at the third terminal 236.

    Double-balanced field-effect transistor mixer with direct single-ended intermediate frequency outputs
    10.
    发明授权
    Double-balanced field-effect transistor mixer with direct single-ended intermediate frequency outputs 有权

    公开(公告)号：US09774297B2

    公开(公告)日：2017-09-26

    申请号：US15158339

    申请日：2016-05-18

    申请人： Linear Technology Corporation

    发明人： Xudong Wang ,  Thomas E. Schiltz ,  William B. Beckwith

    IPC分类号： G06F7/44 ,  H03D7/14 ,  H03H11/32

    CPC分类号： H03D7/1458 ,  H03D7/1441 ,  H03D7/1466 ,  H03D2200/0023 ,  H03H11/32

    摘要： A double-balanced FET mixer may include: single-ended RF port that receives or delivers single-ended RF signal; RF balun that converts the received single-ended RF signal into differential RF signal or generates delivered single-ended RF signal from received differential RF signal; local oscillator input port receives local oscillator signal; direct IF port receives or delivers an IF signal; and at least two FETs process the local oscillator signal and generate or process the differential RF signal and IF signal. The mixer may have no IF balun separate and distinct from tRF balun; may receive an input signal at RF port and generates output signal at IF port. The mixer may receive input signal at IF port and generate an output signal at the RF port, the output signal in either case being plus or minus the local oscillator signal. The double-balanced FET mixer may operate with IF frequencies down to DC.