公开(公告)号：US20140226083A1

公开(公告)日：2014-08-14

申请号：US13843361

申请日：2013-03-15

Applicant: SYNAPTICS INCORPORATED

Inventor： Jim DUNPHY ,  Robert J. BOLENDER ,  Adam SCHWARTZ ,  David HOCH

IPC: G06F1/16

CPC classification number: G06F1/1692 ,  G06F3/044

Abstract: A capacitive input device has a sensor electrode pattern disposed on a first side of a substrate. The sensor electrode pattern comprises a plurality of sensor electrode elements disposed on the first side of a first substrate. A plurality of routing traces is disposed along a first edge of the sensor electrode pattern on the first side of the substrate and configured to communicatively couple at least some of the sensor electrodes with a processing system. A pair of guard traces is disposed in the same layer as and brackets the plurality of routing traces. A guard overlaps the routing traces, is disposed proximate the routing traces on the first side of the substrate, and ohmically couples the pair of guard traces with one another. A second insulator is disposed between the routing traces and the guard. The second insulator and the first insulator are disposed in the same layer.

Abstract translation: 电容性输入装置具有设置在基板的第一侧上的传感器电极图案。 传感器电极图案包括设置在第一基板的第一侧上的多个传感器电极元件。 多个路由迹线沿着基板的第一侧上的传感器电极图案的第一边缘设置并且被配置为使处理系统的至少一些传感器电极通信地耦合。 一对保护迹线设置在与多个路由迹线相同的层中并且支架。 保护层与路由迹线重叠，被布置在衬底的第一侧上的路由迹线附近，并且将一对保护迹线彼此欧姆地耦合。 第二绝缘体设置在路由迹线和防护装置之间。 第二绝缘体和第一绝缘体设置在同一层中。

公开(公告)号：US20150022989A1

公开(公告)日：2015-01-22

申请号：US13947617

申请日：2013-07-22

Applicant: Synaptics Incorporated

Inventor： Jim DUNPHY ,  Joseph Kurth REYNOLDS

IPC: H05K1/02 ,  G01R1/04 ,  H05K1/03

CPC classification number: G06F3/044 ,  G06F2203/04112 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/222 ,  Y02P70/611

Abstract: A chip-on-glass device comprises a chip-on-glass substrate, a metal layer, and a plurality of chip-on-glass connection bumps. The metal layer comprises a plurality of passive jumper routing traces. The plurality of chip-on-glass connection humps is coupled with passive jumper routing traces of the plurality of passive jumper routing traces.

Abstract translation: 玻璃上芯片装置包括玻璃基板，金属层和多个玻璃上玻璃连接凸块。 金属层包括多个无源跳线布线迹线。 多个片上玻璃连接凸起与多个无源跳线布线迹线的无源跳线布线迹线耦合。