公开(公告)号：US20160190987A1

公开(公告)日：2016-06-30

申请号：US14584942

申请日：2014-12-29

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Steve Chikin LO

IPC: H03D7/14 ,  G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  H03D7/1466 ,  H03D2200/0078 ,  H03D2200/0086

Abstract: Disclosed herein are techniques related to a discrete-time harmonic rejection mixer. The discrete-time harmonic rejection mixer includes a switched-capacitor network and a switch controller. The switched-capacitor network includes first, second, and third switched capacitor sub-circuits, each including a pair of capacitors and a set of switches. The switch controller is coupled to the switched-capacitor network, and is configured to operate the sets of switches. More specifically, the switch controller is configured to operate the sets of switches in an out of phase manner to produce the harmonic rejection effect. Capacitance values for the first pair of capacitors are roughly equal to capacitance values for the third pair of capacitors. An input device, method, and harmonic rejection circuit exhibiting the above features are provided as examples.

Abstract translation: 这里公开的是与离散时间谐波抑制混频器有关的技术。 离散时间谐波抑制混频器包括开关电容网络和开关控制器。 开关电容器网络包括第一，第二和第三开关电容器子电路，每个包括一对电容器和一组开关。 开关控制器耦合到开关电容器网络，并且被配置为操作该组开关。 更具体地，开关控制器被配置为以异相方式操作开关组，以产生谐波抑制效应。 第一对电容器的电容值大致等于第三对电容器的电容值。 作为示例提供了具有上述特征的输入装置，方法和谐波抑制电路。

公开(公告)号：US20190034027A1

公开(公告)日：2019-01-31

申请号：US15660393

申请日：2017-07-26

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Steve Chikin LO ,  Keung Kwok KWAN

IPC: G06F3/041 ,  G06F3/044

Abstract: Methods and associated processing systems are disclosed for acquiring gain mismatch values and offset mismatch values corresponding to a plurality of analog-to-digital converters (ADCs). One method comprises coupling receiver circuitry of a processing system with a capacitive sensor comprising a plurality of sensor electrodes, the receiver circuitry comprising a plurality of ADCs, each ADC of the plurality of ADCs coupled with one or more respective sensor electrodes of the plurality of sensor electrodes. The method further comprises, while at least a portion of transmitter circuitry of the processing system is disabled, acquiring measurements using each ADC of the plurality of ADCs; and storing, using the acquired measurements, a plurality of offset mismatch values in a memory of the processing system. The processing system is operable to apply the plurality of offset mismatch values to capacitive measurements acquired using the plurality of ADCs.

公开(公告)号：US20180188845A1

公开(公告)日：2018-07-05

申请号：US15397405

申请日：2017-01-03

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0416

Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal having a predefined first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal having a predefined mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises operating, based on the first demodulation signal, one or more switching elements coupled with one or more sensor electrodes of the first group or the second group, wherein the one or more switching elements are in a conducting state during the mixing period.

公开(公告)号：US20150220206A1

公开(公告)日：2015-08-06

申请号：US14308986

申请日：2014-06-19

Applicant: Synaptics Incorporated

Inventor： Imre KNAUSZ ,  Eric Scott BOHANNON ,  Christopher A. LUDDEN

IPC: G06F3/041 ,  G06F3/045 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/0412 ,  G06F3/044

Abstract: Embodiments include a method (as well as an input device and processing system) that includes driving a display signal onto at least one of a plurality of display electrodes for updating a display, and driving an input sensing signal onto at least one of a plurality of sensor electrodes, where driving the input sensing and driving the display signal at least partially overlap in time. The method further includes receiving, using a coupling electrode disposed proximate to the at least one display electrode, a coupling signal that represents an effect of a signal on at least one of the display electrodes, on a signal on at least one of the sensor electrodes, acquiring resulting signals with at least one of the sensor electrodes, and adjusting the resulting signals based on the coupling signal.

Abstract translation: 实施例包括一种方法（以及输入装置和处理系统），其包括将显示信号驱动到用于更新显示器的多个显示电极中的至少一个上，以及将输入感测信号驱动到多个 传感器电极，其中驱动输入感测和驱动显示信号至少部分地在时间上重叠。 所述方法还包括使用设置在所述至少一个显示电极附近的耦合电极，在至少一个所述传感器电极上的信号上接收表示至少一个显示电极上的信号的影响的耦合信号 用至少一个所述传感器电极获取所得到的信号，并且基于所述耦合信号来调整所得到的信号。

公开(公告)号：US20180284917A1

公开(公告)日：2018-10-04

申请号：US15478965

申请日：2017-04-04

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON

IPC: G06F3/044 ,  G09G5/00 ,  G06F3/0354

CPC classification number: G06F3/044 ,  G06F3/03545 ,  G06F3/0418 ,  G09G5/003

Abstract: A method and related input device and processing system and are disclosed, the method comprising acquiring first capacitive measurements of first resulting signals responsive to driving a first sensing signal, wherein acquiring first capacitive measurements comprises receiving a predefined number of current pulses within a first burst period. The method further comprises acquiring second capacitive measurements of second resulting signals responsive to driving a second sensing signal having a greater sensing frequency. Acquiring the second capacitive measurements comprises inserting, based at least on the sensing frequency of the second sensing signal, one or more null time periods within the second burst period such that the same number of current pulses is received during the second burst period.

公开(公告)号：US20180196542A1

公开(公告)日：2018-07-12

申请号：US15400681

申请日：2017-01-06

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Marshall J. BELL, JR.

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0416

Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal with first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal with a predefined first mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises driving a second capacitive sensing signal having a second sensing frequency different than the first sensing frequency onto a third group of the plurality of sensor electrodes, and acquiring second capacitive measurements of resulting signals received by a fourth group of the plurality of sensor electrodes. Acquiring second capacitive measurements comprises applying a second demodulation signal having a different predefined second mixing period.

公开(公告)号：US20180004317A1

公开(公告)日：2018-01-04

申请号：US15199276

申请日：2016-06-30

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Marshall J. BELL, JR. ,  Yihong YANG

IPC: G06F3/041

CPC classification number: G06F3/041 ,  G06F3/03547 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/0418 ,  G06F3/044

Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.

公开(公告)号：US20170090615A1

公开(公告)日：2017-03-30

申请号：US14871432

申请日：2015-09-30

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Petr SHEPELEV ,  Jeffrey S. LILLIE ,  Thomas MACKIN

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F3/0418 ,  G06F2203/04107 ,  G09G3/3655 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2320/0219 ,  G09G2330/021 ,  G09G2354/00

Abstract: Embodiments described herein include an input device, processing system, and method of performing capacitive sensing using an input device comprising a first plurality of sensor electrodes, a second plurality of sensor electrodes, and a plurality of display electrodes. The method comprises, during a first period, driving the first plurality of sensor electrodes with a first absolute capacitive sensing signal to receive first resulting signals, and driving the second plurality of sensor electrodes and the plurality of display electrodes with a first guarding signal. Each of the first plurality of sensor electrodes comprises at least one common electrode of a display, and wherein each common electrode is configured to be driven for display updating and for capacitive sensing.

公开(公告)号：US20170090610A1

公开(公告)日：2017-03-30

申请号：US14868804

申请日：2015-09-29

Applicant: SYNAPTICS INCORPORATED

Inventor： Petr SHEPELEV ,  Eric Scott BOHANNON ,  Kasra KHAZENI

IPC: G06F3/044 ,  G06F3/041

CPC classification number: G06F3/044 ,  G06F3/03547 ,  G06F3/0416 ,  G06F3/0418 ,  G06F11/00 ,  G06F11/002 ,  G06F11/004 ,  G06F11/006 ,  G06F11/008 ,  G06F11/142 ,  G06F11/1423 ,  G06F11/1428 ,  G06F2201/81 ,  G06F2203/04101

Abstract: This disclosure generally provides an input device that includes a matrix sensor that includes a plurality of sensor electrodes arranged in rows on a common surface or plane. The input device may include a plurality of sensor modules coupled to the sensor electrodes that measure capacitive sensing signals corresponding to the electrodes. Instead of measuring sensor electrodes that are in the same column, the embodiments herein simultaneously measure capacitive sensing signals on at least two sensor electrodes that are in the same row. In one example, the sensor electrodes in the row being measured are spaced the same distance from a side of a substrate coupling the electrodes to the sensor modules and may have approximately the same electrical time constant.

公开(公告)号：US20170075495A1

公开(公告)日：2017-03-16

申请号：US15265465

申请日：2016-09-14

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy ROBERSON ,  David SOBEL ,  Farzaneh SHAHROKHI ,  Adam SCHWARTZ ,  Don SPECK ,  Eric Scott BOHANNON

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/044 ,  G06F2203/04108

Abstract: Embodiments described herein include an input device with a plurality of capacitive sensor electrodes configured to receive a signal. The input device also includes a processing system coupled to the plurality of capacitive sensor electrodes. The processing system includes an analog front end (AFE). The AFE includes an anti-aliasing filter comprising a continuous time analog infinite impulse response (IIR) filter configured to filter out interference from the received signal at frequencies higher than a signal frequency of the processing system to produce an anti-aliased signal. The AFE also includes a charge integrator configured to integrate the anti-aliased signal.

Abstract translation: 本文描述的实施例包括具有被配置为接收信号的多个电容传感器电极的输入装置。 输入装置还包括耦合到多个电容传感器电极的处理系统。 处理系统包括模拟前端（AFE）。 AFE包括抗混叠滤波器，其包括连续时间模拟无限脉冲响应（IIR）滤波器，其被配置为以高于处理系统的信号频率的频率滤除来自接收信号的干扰，以产生抗混叠信号。 AFE还包括电荷积分器，其被配置为集成抗混叠信号。