公开(公告)号：US20240265883A1

公开(公告)日：2024-08-08

申请号：US18498796

申请日：2023-10-31

Applicant: Samsung Display Co., LTD.

Inventor： SEUNG-JUN LEE ,  TAE-HO KIM ,  YONGSU LEE ,  JAEWOO LEE ,  SEUNG-HWAN CHO

IPC: G09G3/3291

CPC classification number: G09G3/3291 ,  G09G2310/0297 ,  G09G2330/12

Abstract: A display device includes: a demux circuit portion including: a first transistor including a part of a first lower gate pattern, a second transistor including a part of a second lower gate pattern, a first control line connected to the first lower gate pattern and supplying a first lighting test control signal or a first demux control signal, and a second control line connected to the second lower gate pattern and supplying a second lighting test control signal or a second demux control signal, and a lighting circuit portion connected to the demux circuit portion and including: a third transistor including another part of the first lower gate pattern and receiving the first lighting test control signal or the first demux control signal, and a fourth transistor including another part of the second lower gate pattern and receiving the second lighting test control signal or the second demux control signal.

公开(公告)号：US20250046242A1

公开(公告)日：2025-02-06

申请号：US18741773

申请日：2024-06-13

Applicant: Samsung Display Co., Ltd.

Inventor： TAE-HO KIM ,  SEUNG-JUN LEE ,  YONGSU LEE ,  JAEWOO LEE ,  SEUNG-HWAN CHO

IPC: G09G3/3225 ,  H10K59/126 ,  H10K59/131

Abstract: A display device including: a display panel containing pixels connected to a light emitting control line and a light emitting control driver including a light emitting control stage that provides a light emitting control signal to the pixels through the light emitting control line, wherein the light emitting control stage includes: a first light emitting control transistor including a first electrode connected to the light emitting control line, a gate electrode connected to a first light emitting control clock line, and a second electrode connected to a first node, a first power voltage line to which a first power voltage is applied; and a shielding pattern extending between the first light emitting control transistor and the first power voltage line and receiving a power voltage higher than the first power voltage.

公开(公告)号：US20240099064A1

公开(公告)日：2024-03-21

申请号：US18363953

申请日：2023-08-02

Applicant: Samsung Display Co., LTD.

Inventor： Yong Su LEE ,  SEUNG-JUN LEE ,  JAEWOO LEE ,  Sung Chan JO

IPC: H10K59/121

CPC classification number: H10K59/1213

Abstract: A display device includes a semiconductor layer positioned on a substrate and including a driving transistor and a plurality of transistors; a gate conductive layer positioned on the semiconductor layer; and a data conductive layer positioned on the gate conductive layer. The driving transistor has a linear shape in which a plurality of grooves are formed.

公开(公告)号：US20240005867A1

公开(公告)日：2024-01-04

申请号：US18138123

申请日：2023-04-24

Applicant: Samsung Display Co., Ltd.

Inventor： JAEWOO LEE ,  YONGSU LEE ,  SEUNG-JUN LEE

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G2300/0819 ,  G09G2310/0202 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0238

Abstract: A display device is disclosed that includes a display panel including a pixel and a scan driver to provide a first scan signal to a third scan signal to the pixel. The pixel includes a light emitting element, a first transistor connected between a first voltage line and the light emitting element, a second transistor connected between a data line and a first node, a gate electrode of the second transistor to receive a first scan signal, a third transistor connected between the second node and the first transistor, a gate electrode of the third transistor to receive a second scan signal, and a fourth transistor connected between a first initialization voltage line, which is to receive a first initialization voltage, and the second node, a gate electrode of the fourth transistor to receive a third scan signal. The first to third scan signals include first to third activation sections, and the first to third activation sections have an equal duration.

公开(公告)号：US20250081771A1

公开(公告)日：2025-03-06

申请号：US18624825

申请日：2024-04-02

Applicant: Samsung Display Co., LTD.

Inventor： SEUNG-JUN LEE ,  YONGSU LEE ,  JAEWOO LEE ,  SUNGEUN LEE

IPC: H10K59/131 ,  G09G3/32

Abstract: A display device includes: an active layer disposed on a substrate, a first gate layer disposed on the active layer and including a first gate electrode, a second gate layer disposed on the first gate layer and including a capacitor electrode partially overlapping the first gate electrode, the capacitor electrode and the first gate electrode forming a first capacitor, a third gate layer disposed on the second gate layer and including a first power voltage line partially overlapping the capacitor electrode and receiving a first power voltage, the first power voltage line and the capacitor electrode forming a second capacitor, a data conductive layer disposed on the third gate layer, and an inorganic insulating layer disposed between the third gate layer and the data conductive layer, and covering the third gate layer.

公开(公告)号：US20240169870A1

公开(公告)日：2024-05-23

申请号：US18239919

申请日：2023-08-30

Applicant: Samsung Display Co., LTD.

Inventor： JAEWOO LEE ,  TAE-HO KIM ,  SEUNG-JUN LEE ,  YONGSU LEE ,  SEUNG-HWAN CHO

IPC: G09G3/00

CPC classification number: G09G3/006 ,  G09G2300/0426 ,  G09G2310/0297

Abstract: A display device according to the invention includes: a display panel and a driving chip mounted on the display panel. The display panel includes: a base layer, pixels, signal lines, fan-out lines, and a selection circuit. The base layer includes a first region, a second region bent with respect to a bending axis, and a third region adjacent to the second region. The pixels are arranged in the first region, and the signal lines are arranged in the first region and connected to the pixels. The fan-out lines are arranged in the second region and connected to the signal lines. The selection circuit is arranged between the fan-out lines and the driving chip in the third region and connected to the fan-out lines and the driving chip.

公开(公告)号：US20240321160A1

公开(公告)日：2024-09-26

申请号：US18605817

申请日：2024-03-15

Applicant: Samsung Display Co., Ltd.

Inventor： SEUNG-JUN LEE ,  TAE-HO KIM ,  YONGSU LEE ,  JAEWOO LEE ,  SEUNG-HWAN CHO

IPC: G09G3/00 ,  H01L27/12

CPC classification number: G09G3/035 ,  H01L27/124 ,  G09G2310/027 ,  G09G2310/0291 ,  G09G2310/0297

Abstract: A display apparatus is disclosed that includes a data driver, a demux circuit, a first wiring mixing structure, a second wiring mixing structure, a display panel and a bending area. The data driver includes first to fourth output amplifiers. The demux circuit is configured to branch the first to fourth output amplifiers to first to eighth output lines through demux switching. The first wiring mixing structure is connected to the demux circuit. The second wiring mixing structure is connected to the first wiring mixing structure. The display panel includes data lines connected to the second wiring mixing structure. The bending area is disposed between the display panel and the data driver. The demux circuit is disposed between an integrated circuit area of the data driver and the bending area. The bending area includes a bending line for folding elements toward a rear surface of the display panel. The display panel is disposed on a first side of the bending line and the demux circuit and the integrated circuit area are disposed on a second side of the bending line.

公开(公告)号：US20240153463A1

公开(公告)日：2024-05-09

申请号：US18494014

申请日：2023-10-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAEWOO LEE ,  TAEHO KIM ,  SEUNGJUN LEE ,  YONGSU LEE ,  SEUNGHWAN CHO

IPC: G09G3/3266 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0205 ,  G09G2310/0213 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/045 ,  G09G2330/021

Abstract: A display apparatus according to an embodiment includes a gate driving circuit configured to sequentially output gate signals during a compensation period of a frame period, in which a threshold voltage of a driving transistor is compensated, wherein a gate signal output by each of a plurality of stages is simultaneously supplied to gate lines arranged in two or more rows corresponding thereto.

公开(公告)号：US20230143823A1

公开(公告)日：2023-05-11

申请号：US17891505

申请日：2022-08-19

Applicant: Samsung Display Co., Ltd.

Inventor： JAEWOO LEE ,  YONGSU LEE ,  SEUNG-JUN LEE

IPC: H01L27/32

CPC classification number: H01L27/3279

Abstract: A display panel and an electronic apparatus including the display panel are provided. The display panel includes a base layer including a display area and a non-display area, signal lines disposed in a first direction, each of the signal lines extending in a second direction intersecting the first direction, and connection patterns. Each of the connection patterns include a first line electrically connected to at least one of the signal lines through a contact portion and extending in the first direction, and a second line electrically connected to the first line and extending in the second direction. The contact portion between the first line and the at least one of signal lines is disposed in the display area, and the first lines of the connection patterns have a same length.