Abstract:
A display panel includes first and second test lines connected to the each of data lines, extending in the second direction, and arranged in the first direction, a first test pad electrically connected to the first test line, the first test pad and the first test line being formed from a same layer, and a second test pad electrically connected to the second test line through a contact hole formed through a first insulation layer and disposed adjacent to the first test pad in the second direction.
Abstract:
A display panel includes first and second test lines connected to the each of data lines, extending in the second direction, and arranged in the first direction, a first test pad electrically connected to the first test line, the first test pad and the first test line being formed from a same layer, and a second test pad electrically connected to the second test line through a contact hole formed through a first insulation layer and disposed adjacent to the first test pad in the second direction.
Abstract:
An array test device for a display panel includes a stage on which the display panel including a plurality of pixel circuits is disposed, a contact unit including a plurality of probe pins, an adjustment unit which adjusts the contact unit such that the probe pins contact a plurality of pads of the display panel, and a testing unit which applies an array test signal to the pixel circuits of the display panel through the probe pins and the pads, receives a test result signal from the pixel circuits through the pads and the probe pins, generates waveform information representing a waveform of the test result signal, and determines whether the pixel circuits are defective based on the waveform information.
Abstract:
Rather than forming a data line continuously extending in one layer of a thin film transistor substrate, spaced apart segments of a first data connection pattern are formed in a same first layer as that of the gate lines but extending in a crossing direction. Spaced apart parts of a second data connection pattern are formed in a same second layer as that of the source electrodes of the substrate and also extending in the crossing direction. The segments of the first data connection pattern are connected to successive parts of the second data connection pattern to form completed data lines. In one embodiment, the gate lines of the first layer and the spaced apart segments of a first data connection pattern include a low resistivity metal such as copper.
Abstract:
A display panel includes first to third test lines connected to the each of data lines, extending in the second direction, and arranged in the first direction, a first test pad electrically connected to the first test line, the first test pad and the first test line being formed from a same layer, a second test pad electrically connected to the second test line through a contact hole formed through a first insulation layer, and disposed adjacent to the first test pad in the second direction, a third test pad electrically connected to the third test line and disposed adjacent to the first test pad in the first direction, the third test pad and the third test line being formed from a same layer.