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公开(公告)号:US11183124B2
公开(公告)日:2021-11-23
申请号:US17065075
申请日:2020-10-07
发明人: Yang Hwa Choi , Bo Yong Chung , Tak Young Lee , Sang Uk Lim
IPC分类号: G09G3/32 , G09G3/3266 , G09G3/3233
摘要: A scan driver for a display device includes a plurality of stages outputting scan signals. A first stage of the plurality of stages includes first to sixth transistors connected to a first carry clock line, a carry line, a previous carry line, and a second carry clock line. In a first frame period, the second carry clock line is configured to receive a second carry clock signal having at least one pulse with substantially the same phase as at least one of first pulses of a first carry clock signal to be applied to the first carry clock line.
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公开(公告)号:US11699399B2
公开(公告)日:2023-07-11
申请号:US17577301
申请日:2022-01-17
发明人: Jong Hee Kim , Tak Young Lee , Bo Yong Chung , Yang Hwa Choi
IPC分类号: G09G3/3266 , G09G3/3258
CPC分类号: G09G3/3266 , G09G3/3258 , G09G2310/0202
摘要: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.
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公开(公告)号:US11238811B2
公开(公告)日:2022-02-01
申请号:US16935303
申请日:2020-07-22
发明人: Bo Yong Chung , Tak Young Lee , Sang Uk Lim
IPC分类号: G09G3/3266 , G09G3/3275 , G09G3/3258
摘要: A stage and a scan driver having the same. The stage outputs a scan signal and a sensing signal to a scan line and a sensing line, respectively. The stage includes a first controller configured to control a voltage of a sensing node and a driving node based on first to third control signals and a carry signal of the stage and another stage connected to the stage, a second controller configured to control a voltage of an inversion driving node based on a first carry clock signal, the voltage of the driving node, and the third control signal, and a first output buffer configured to output a second carry clock signal or a second low potential power as the carry signal in correspondence with the voltage of the driving node and the inversion driving node.
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公开(公告)号:US11227552B2
公开(公告)日:2022-01-18
申请号:US16903307
申请日:2020-06-16
发明人: Jong Hee Kim , Tak Young Lee , Bo Yong Chung , Yang Hwa Choi
IPC分类号: G09G3/3266 , G09G3/3258
摘要: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.
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公开(公告)号:US10074314B2
公开(公告)日:2018-09-11
申请号:US14861622
申请日:2015-09-22
发明人: Tak Young Lee , Chul Kyu Kang , Young In Hwang , Ji Hye Kong , Deok Young Choi
IPC分类号: G09G3/32 , G09G3/3266 , G09G3/3233 , H01L27/32
CPC分类号: G09G3/3266 , G09G3/3233 , G09G2300/0413 , G09G2300/0426 , G09G2320/0223 , H01L27/3279
摘要: An organic light-emitting display device includes a substrate having a display area and a non-display area, a thin-film transistor (TFT) that includes a gate electrode and that is disposed in the display area of the substrate, a first scan line disposed in a same layer as the gate electrode that is connected to the gate electrode; and a second scan line disposed in a different layer from the first scan line that overlaps the first scan line, wherein the first scan line is connected to the second scan line in the non-display area of the substrate.
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