Abstract:
A stage of a scan driver includes: a first driving controller for controlling a voltage of a first node and a voltage of a second node; a second driving controller for controlling a voltage of a first driving node, based on a sensing-on signal, a next carry signal, a first control clock signal, a second control clock signal, the voltage of the first node, and a voltage of a sampling node, and controlling a voltage of a second driving node, based on the voltage of the sampling node and the voltage of the first driving node; an output buffer for outputting a carry signal, the first scan signal, and the second scan signal; and a coupling controller. The second driving controller maintains the voltage of the first driving node as a gate-off voltage in response to the voltage of the second driving node and a third control clock signal.
Abstract:
A method of driving an organic light emitting display device may include concurrently initializing pixels by adjusting a voltage level of a power voltage which is provided to the pixels during an initialization period of a (2k−1)-th image frame, sequentially writing a first data signal including the (2k−1)-th image frame into the pixels by sequentially performing a scanning operation on a plurality of scan lines in a first direction, displaying the (2k−1)-th image frame by sequentially providing an emission signal to emission lines in the first direction, concurrently initializing the pixels during an initialization period of a (2k)-th image frame, sequentially writing a second data signal including the (2k)-th image frame into the pixels by sequentially performing the scanning operation on the scan lines in a second direction, and displaying the (2k)-th image frame by sequentially providing the emission signal to the emission lines in the second direction.
Abstract:
A scan driver includes a first transistor including gate, first, and second electrodes coupled to a Q node, a scan clock line, and a scan line. A second transistor includes gate and first electrodes coupled to a scan carry line, and a second electrode coupled to the Q node. A third transistor includes gate and first electrodes coupled to a first control line and a sensing carry line. A fourth transistor includes a gate and first electrode coupled to the sensing carry line and the third transistor first electrode. A fifth transistor includes gate, first, and second electrodes coupled to a fourth transistor second electrode, a second control line, and a node. A capacitor includes first and second electrodes coupled to the fifth transistor first and gate electrodes. A sixth transistor includes gate, first, and second electrodes coupled to a third control line, the node, and the Q node.
Abstract:
A scan driver for a display device includes a plurality of stages outputting scan signals. A first stage of the plurality of stages includes first to sixth transistors connected to a first carry clock line, a carry line, a previous carry line, and a second carry clock line. In a first frame period, the second carry clock line is configured to receive a second carry clock signal having at least one pulse with substantially the same phase as at least one of first pulses of a first carry clock signal to be applied to the first carry clock line.
Abstract:
A scan driver includes two or more scan signal output circuits (SSOC), each being coupled to a first scan line (FSL) and a second scan line (SSL), and including a driving circuit, a first buffer circuit (FBC), and a second buffer circuit (SBC). The driving circuit applies a first driving signal (DS) to a first driving node (DN) and applies a second DS to a second DN based on an input signal, a clock signal (CS), a display-on signal, and an on-level voltage. The input signal is a scan start signal or a previous scan signal. The FBC outputs a sensing signal to the SSL based on the first DS, the second DS, an off-level voltage, and a sensing CS. The SBC outputs a scan signal to the FSL based on the first DS, the second DS, the off-level voltage, and a scan CS.
Abstract:
A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.
Abstract:
A scan driver includes a first transistor including gate, first, and second electrodes coupled to a Q node, a scan clock line, and a scan line. A second transistor includes gate and first electrodes coupled to a scan carry line, and a second electrode coupled to the Q node. A third transistor includes gate and first electrodes coupled to a first control line and a sensing carry line. A fourth transistor includes a gate and first electrode coupled to the sensing carry line and the third transistor first electrode. A fifth transistor includes gate, first, and second electrodes coupled to a fourth transistor second electrode, a second control line, and a node. A capacitor includes first and second electrodes coupled to the fifth transistor first and gate electrodes. A sixth transistor includes gate, first, and second electrodes coupled to a third control line, the node, and the Q node.
Abstract:
A pixel of an organic light emitting display device includes a first transistor connected between a data line and a first node, a second transistor connected between a second node and a third node, a third transistor connected between the second node and a fourth node, a fourth transistor connected between the first node and the second node, a fifth transistor connected between the third node and an initializing power source, a sixth transistor connected between a first power source and the third node, a capacitor connected between the first node and the fourth node, and an organic light emitting diode (OLED) connected between the second node and a second power source.
Abstract:
A display device of the present inventive concept includes a processor supplying grayscale data in active periods of frame periods and stopping supply of the grayscale data in blank periods of the frame periods; a switch controller generating a first switch control signal when a blank period is longer than a predetermined period, and generating a second switch control signal when the blank period ends; a power supply supplying a voltage different from a first power voltage to a first power line when the first switch control signal is received and supplying the first power voltage to the first power line when the second switch control signal is received; and pixels commonly connected to the first power line.
Abstract:
A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.