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公开(公告)号:US20240179984A1
公开(公告)日:2024-05-30
申请号:US18520849
申请日:2023-11-28
发明人: Yanghee KIM , Jaewon KIM , Hyungjun PARK , Jintae JEONG
IPC分类号: H10K59/131 , H10K59/124
CPC分类号: H10K59/131 , H10K59/124
摘要: A display apparatus includes: a substrate including a plurality of sub-pixel areas; an inorganic insulating layer defining a groove between two adjacent sub-pixel areas from among the plurality of sub-pixel areas in a plan view; an organic material layer filled in the groove; and a wiring line disposed on the organic material layer and passing through the two adjacent sub-pixel areas, where the organic material layer includes a first portion overlapping the groove in the plan view and a second portion extending from the first portion in an extension direction of the wiring line.
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公开(公告)号:US20140346520A1
公开(公告)日:2014-11-27
申请号:US14227654
申请日:2014-03-27
发明人: Jaewon KIM , Boyeong KIM , Soo-Hyun KIM , Kyung-ho PARK , HyungJun PARK , Dong-Hyun YOO , Ki Yeup LEE , Seongyoung LEE
IPC分类号: H01L27/12
CPC分类号: H01L27/1255 , G09G3/3266 , G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G09G2330/04 , G09G2330/06
摘要: A driver includes a dummy stage and one or more additional stages coupled to the dummy stage. The dummy stage includes a first transistor coupled between an input terminal and an output terminal. The first transistor includes two electrodes forming at least a first capacitor to store at least a portion of static electricity received through the input terminal. The one or more additional stages output gate signals, which may be received, for example, by a display device.
摘要翻译: 驱动器包括虚拟级和耦合到虚拟级的一个或多个附加级。 虚设级包括耦合在输入端和输出端之间的第一晶体管。 第一晶体管包括形成至少第一电容器的两个电极,以存储通过输入端子接收的至少一部分静电。 一个或多个附加级输出门信号,其可以例如由显示设备接收。
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公开(公告)号:US20230079769A1
公开(公告)日:2023-03-16
申请号:US17991692
申请日:2022-11-21
发明人: Hyunae PARK , Jaewon KIM , Seungwoo SUNG , Jun-yong AN , Nuree UM , Ji-eun LEE , Yun-kyeong IN , Donghyeon JANG , Seunghan JO , Junyoung JO
IPC分类号: H01L27/32 , G09G3/3225 , G09G3/3266 , H01L51/52
摘要: A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.
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公开(公告)号:US20230351965A1
公开(公告)日:2023-11-02
申请号:US18220273
申请日:2023-07-11
发明人: Jun-yong AN , Jaewon KIM , Hyunae PARK , Hyungjun PARK , Seungwoo SUNG , Young-soo YOON , Ji-eun LEE , Yun-kyeong IN , Donghyeon JANG , Junyoung JO
IPC分类号: G09G3/3233 , H10K59/131
CPC分类号: G09G3/3233 , H10K59/131 , G09G2300/0426
摘要: A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.
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公开(公告)号:US20220093722A1
公开(公告)日:2022-03-24
申请号:US17465420
申请日:2021-09-02
发明人: Hyunae PARK , Jaewon KIM , Seungwoo SUNG , Jun-yong AN , Nuree UM , Ji-eun LEE , Yun-kyeong IN , Donghyeon JANG , Seunghan JO , Junyoung JO
IPC分类号: H01L27/32 , G09G3/3225 , G09G3/3266 , H01L51/52
摘要: A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.
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公开(公告)号:US20210335988A1
公开(公告)日:2021-10-28
申请号:US17234180
申请日:2021-04-19
发明人: Nuree UM , Wonkyu KWAK , Kyung-Hoon KIM , Mihae KIM , Jaewon KIM , Hyungjun PARK , Changsoo PYON , Kyonghwan OH , Junwon CHOI
摘要: A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region.
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公开(公告)号:US20240244909A1
公开(公告)日:2024-07-18
申请号:US18426231
申请日:2024-01-29
发明人: Hyunae PARK , Jaewon KIM , Seungwoo SUNG , Jun-yong AN , Nuree UM , Ji-eun LEE , Yun-kyeong IN , Donghyeon JANG , Seunghan JO , Junyoung JO
IPC分类号: H10K59/131 , G09G3/3225 , G09G3/3266 , H01L27/12 , H10K50/84 , H10K50/86 , H10K59/121 , H10K59/123 , H10K59/40 , H10K59/65 , H10K59/88
CPC分类号: H10K59/1315 , G09G3/3225 , G09G3/3266 , H10K50/841 , H10K50/86 , H10K59/1213 , H10K59/1216 , H10K59/123 , H10K59/40 , H10K59/65 , H10K59/88 , G09G2300/0426 , G09G2300/08 , H01L27/124 , H01L27/1255
摘要: A display panel including a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.
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公开(公告)号:US20230413624A1
公开(公告)日:2023-12-21
申请号:US18242713
申请日:2023-09-06
发明人: Junyoung MIN , Jaewon KIM , Junwon CHOI
IPC分类号: H10K59/131 , H10K59/65 , H10K59/121
CPC分类号: H10K59/131 , H10K59/65 , H10K59/1213 , H01L29/7869
摘要: A display device includes: a substrate in which a transmission area, a display area, a non-display area and the display area, and a peripheral area are defined; pixels arranged on the display area; initialization gate lines and compensation gate lines extending along pixel rows; gate driving circuits disposed on the peripheral area; and gate connection lines disposed on the non-display area. A k-th gate driving circuit among the gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines and n-th and (n+1)-th compensation gate lines. First portions of the n-th and (n+1)-th compensation gate lines and second portions of the n-th and (n+1)-th compensation gate lines, which are physically apart from each other by the transmission area, are electrically connected to each other through a first gate connection line among gate connection lines.
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公开(公告)号:US20200176551A1
公开(公告)日:2020-06-04
申请号:US16687917
申请日:2019-11-19
发明人: Hyunae PARK , Jaewon KIM , Seungwoo SUNG , Jun-yong AN , Nuree UM , Ji-eun LEE , Yun-kyeong IN , Donghyeon JANG , Seunghan JO , Junyoung JO
IPC分类号: H01L27/32 , H01L51/52 , G09G3/3225 , G09G3/3266
摘要: A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.
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公开(公告)号:US20210091164A1
公开(公告)日:2021-03-25
申请号:US16917716
申请日:2020-06-30
发明人: Byungsun KIM , Wonkyu KWAK , Kyeonghwa KIM , Jaewon KIM , Hyungjun PARK , Seungyeon CHO , Junwon CHOI
IPC分类号: H01L27/32 , G09G3/3275 , G09G3/3266
摘要: A display device includes: a substrate including a display area and a peripheral area outside the display area, the display area including a first display area and a second display area; a first fan-out portion in a portion of the peripheral area outside the first display area; a second fan-out portion outside the first fan-out portion; a first power supply line in the peripheral area corresponding to one side of the display area and overlapping at least a portion of the first fan-out portion; and a second power supply line in the peripheral area outside the display area and overlapping at least a portion of the second fan-out portion.
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