公开(公告)号：US12249269B2

公开(公告)日：2025-03-11

申请号：US18213897

申请日：2023-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： Sangmin Lee ,  Se-Byung Chae ,  Subin Kim ,  Hyunchang Kim

IPC: G09G3/32

Abstract: A data driver includes output channels configured to output data signals, output controllers selectively outputting data signals having a first arrangement or data signals having a second arrangement to output channel groups each of which includes N output channels in response to arrangement control signals, where N is a positive integer greater than or equal to 2, and a control signal generator outputting the arrangement control signals to the output controllers to control the output controllers.

公开(公告)号：US12205518B2

公开(公告)日：2025-01-21

申请号：US18376468

申请日：2023-10-04

Applicant: Samsung Display Co., Ltd.

Inventor： Hyunchang Kim ,  Se-Byung Chae

IPC: G09G3/30 ,  G05F1/46 ,  G09G3/20

Abstract: A power voltage generator includes an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage, a resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage, a decoding unit configured to generate reference voltages by decoding the distribution voltages, and a regulator unit configured to generate driving voltages based on the reference voltages.

公开(公告)号：US12183258B2

公开(公告)日：2024-12-31

申请号：US17869200

申请日：2022-07-20

Applicant: Samsung Display Co., Ltd.

Inventor： Subin Kim ,  Se-Byung Chae ,  Hyunchang Kim

IPC: G09G3/20 ,  G09G3/00 ,  G09G3/3266 ,  G09G3/3275

Abstract: Disclosed is a display device, which includes a display panel, a controller that receives an image signal and an external synchronization signal and generates a control signal, and a driver that generates a driving signal in response the control signal and provides the driving signal to the display panel. The controller includes a synchronization signal generator that generates an internal synchronization signal based on a reference clock signal, a corrector that corrects the internal synchronization signal to generate a corrected synchronization signal, and a control signal generator that generates the control signal, and the control signal generator generates the control signal based on the external synchronization signal when the external synchronization signal is in a normal state, and generates the control signal based on the internal synchronization signal when the external synchronization signal is in an abnormal state.