公开(公告)号：US20240321200A1

公开(公告)日：2024-09-26

申请号：US18435922

申请日：2024-02-07

Applicant: Samsung Display Co., Ltd.

Inventor： Jaewoo Lee ,  Taeho Kim ,  Seungjun Lee ,  Yongsu Lee ,  Seunghwan Cho

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0452 ,  G09G2300/0842 ,  G09G2320/0233

Abstract: A display apparatus for reducing a reduction in image quality due to signal interference between adjacent lines comprises a substrate, pixels comprising at least a first pixel group to a third pixel group, data lines comprising at least a first data line to a third data line, and a data distributor for alternately transferring data signals to at least one pair of data lines among the data lines, wherein one end of a first horizontal line of the first data line is arranged adjacent to blue-based pixels of the first pixel group, one end of a second horizontal line of the second data line is arranged adjacent to green-based pixels of the second pixel group, and one end of a third horizontal line of the third data line is arranged adjacent to blue-based pixels of the third pixel group.

公开(公告)号：US11955083B2

公开(公告)日：2024-04-09

申请号：US18138123

申请日：2023-04-24

Applicant: Samsung Display Co., Ltd.

Inventor： Jaewoo Lee ,  Yongsu Lee ,  Seung-Jun Lee

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0202 ,  G09G2310/08 ,  G09G2320/0238

Abstract: A display device is disclosed that includes a display panel including a pixel and a scan driver to provide a first scan signal to a third scan signal to the pixel. The pixel includes a light emitting element, a first transistor connected between a first voltage line and the light emitting element, a second transistor connected between a data line and a first node, a gate electrode of the second transistor to receive a first scan signal, a third transistor connected between the second node and the first transistor, a gate electrode of the third transistor to receive a second scan signal, and a fourth transistor connected between a first initialization voltage line, which is to receive a first initialization voltage, and the second node, a gate electrode of the fourth transistor to receive a third scan signal. The first to third scan signals include first to third activation sections, and the first to third activation sections have an equal duration.

公开(公告)号：US12183229B2

公开(公告)日：2024-12-31

申请号：US18239919

申请日：2023-08-30

Applicant: Samsung Display Co., LTD.

Inventor： Jaewoo Lee ,  Tae-Ho Kim ,  Seung-Jun Lee ,  Yongsu Lee ,  Seung-Hwan Cho

IPC: G09G3/00 ,  G09G3/32

Abstract: A display device according to the invention includes: a display panel and a driving chip mounted on the display panel. The display panel includes: a base layer, pixels, signal lines, fan-out lines, and a selection circuit. The base layer includes a first region, a second region bent with respect to a bending axis, and a third region adjacent to the second region. The pixels are arranged in the first region, and the signal lines are arranged in the first region and connected to the pixels. The fan-out lines are arranged in the second region and connected to the signal lines. The selection circuit is arranged between the fan-out lines and the driving chip in the third region and connected to the fan-out lines and the driving chip.

公开(公告)号：US20240373698A1

公开(公告)日：2024-11-07

申请号：US18642414

申请日：2024-04-22

Applicant: Samsung Display Co., Ltd.

Inventor： Jaewoo Lee ,  Taeho Kim ,  Seungjun Lee ,  Yongsu Lee ,  Seunghwan Cho

IPC: H10K59/131

Abstract: A display apparatus includes: a common voltage supply line on a peripheral area; a vertical common voltage line extending in a first direction on a display area, and electrically connected to the common voltage supply line; a horizontal common voltage line extending in a second direction on the display area, and electrically connected to the common voltage supply line; a data input line on the peripheral area; a data line on the display area; a connection line on the display area, connecting the data input line to the data line, and including: a vertical connection portion extending in the first direction; and a horizontal connection portion extending in the second direction; and a first conductive pattern at the same layer as the horizontal common voltage line, spaced from the horizontal connection portion, and connected to the vertical common voltage line crossing the horizontal connection portion through a contact hole.