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公开(公告)号:US20170084708A1
公开(公告)日:2017-03-23
申请号:US15369008
申请日:2016-12-05
发明人: Jung Hwan HWANG , Bon-Yong KOO , Soo Jin PARK , Jong-Moon PARK , Yong Hee LEE , Jong-Hyuk LEE , Duc-Han CHO
IPC分类号: H01L29/417 , H01L27/12
CPC分类号: H01L29/41733 , H01L27/1214 , H01L27/124 , H01L27/156 , H01L29/41775
摘要: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.
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公开(公告)号:US20140191238A1
公开(公告)日:2014-07-10
申请号:US14099977
申请日:2013-12-08
发明人: Jung Hwan HWANG , Bon-Yong KOO , Soo Jin PARK , Jong-Moon PARK , Yong Hee LEE , Jong-Hyuk LEE , Duc-Han CHO
CPC分类号: H01L29/41733 , H01L27/1214 , H01L27/124 , H01L27/156 , H01L29/41775
摘要: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.
摘要翻译: 薄膜晶体管阵列面板包括在延伸方向上延伸的栅极线,并且包括从其延伸的栅极和虚拟栅电极; 源电极和在其第一端包括漏极的单个漏极构件和在其相对的第二端处的虚设漏电极。 漏电极相对于栅电极面对源电极,虚设漏电极与虚拟栅电极重叠。 漏极和虚设漏电极分别包括在延伸方向上具有预定宽度的多个第一和第二区域。 第二区域包括与延伸方向形成约0度至约90度的角度的边缘,并且多个第二区域中的至少一个的平面区域与剩余的第二区域的平面区域不同。
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