公开(公告)号：US09496289B2

公开(公告)日：2016-11-15

申请号：US14552619

申请日：2014-11-25

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Ouck Ahn ,  Seung Sok Son

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1259

Abstract: A thin film transistor array panel includes: a substrate; a gate line and a common voltage line electrically separated from each other and elongated parallel with each other on the substrate; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connection member on the second passivation layer and electrically separated from each other. The connection member is elongated in a horizontal direction parallel with the gate line and connects the common voltage line and the common electrode to each other.

Abstract translation: 薄膜晶体管阵列面板包括：基板; 栅极线和公共电压线彼此电分离并在基板上彼此平行延伸; 栅极线和公共电压线上的栅极绝缘层; 栅极绝缘层上的第一钝化层; 在第一钝化层上的公共电极; 公共电极上的第二钝化层; 以及在第二钝化层上的像素电极和连接构件，并且彼此电分离。 连接构件在与栅极线平行的水平方向上伸长并将公共电压线和公共电极彼此连接。