公开(公告)号：US10115365B2

公开(公告)日：2018-10-30

申请号：US15231246

申请日：2016-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Beom-Jun Kim ,  Myung-Koo Hur ,  Bong-Jun Lee ,  Yeon-Kyu Moon ,  Myung-Sub Lee ,  Gyu-Tae Kim

IPC: G09G3/36 ,  G11C19/28 ,  H03K17/693

Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.