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公开(公告)号:US20250048837A1
公开(公告)日:2025-02-06
申请号:US18920252
申请日:2024-10-18
Applicant: Samsung Display Co., Ltd.
Inventor: Seokkyu HAN , Younggil PARK , Jeonghun KWAK , Kihyun KIM , Sungwook WOO , Sunwoo LEE , Huiyeon CHOE
IPC: H10K59/121 , H01L27/12 , H01L29/786 , H10K59/131
Abstract: The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.
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公开(公告)号:US20230209900A1
公开(公告)日:2023-06-29
申请号:US18116888
申请日:2023-03-03
Applicant: Samsung Display Co., Ltd.
Inventor: Seokkyu HAN , Younggil PARK , Jeonghun KWAK , Kihyun KIM , Sungwook WOO , Sunwoo LEE , Huiyeon CHOE
IPC: H10K59/121 , H10K59/131
CPC classification number: H10K59/1213 , H10K59/131 , H01L27/1225
Abstract: The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.
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公开(公告)号:US20220005902A1
公开(公告)日:2022-01-06
申请号:US17319580
申请日:2021-05-13
Applicant: Samsung Display Co., Ltd.
Inventor: Seokkyu HAN , Younggil PARK , Jeonghun KWAK , Kihyun KIM , Sungwook WOO , Sunwoo LEE , Huiyeon CHOE
IPC: H01L27/32
Abstract: The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.
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公开(公告)号:US20210384229A1
公开(公告)日:2021-12-09
申请号:US17320963
申请日:2021-05-14
Applicant: Samsung Display Co., Ltd.
Inventor: Sunwoo LEE , Kihyun KIM , Younggil PARK , Seulgi LEE , Geunhyuk CHOI , Jaebum HAN
IPC: H01L27/12 , H01L29/786
Abstract: A display apparatus includes a first silicon transistor including a first semiconductor layer including a silicon-based semiconductor and a first gate electrode; a first oxide transistor including a second semiconductor layer and a second gate electrode, the second semiconductor layer including an oxide-based semiconductor; an upper insulating layer on the first and second semiconductor layers; and a first connection electrode on the upper insulating layer, electrically connected to the first semiconductor layer through a first contact hole of the upper insulating layer, and electrically connected to the second semiconductor layer through a second contact hole of the upper insulating layer. The second semiconductor layer includes a channel region, a source region, and a drain region, and a first distance between the channel region of the second semiconductor layer and the first contact hole is about 2 μm or greater.
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