公开(公告)号：US20150228241A1

公开(公告)日：2015-08-13

申请号：US14448558

申请日：2014-07-31

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Soon Lee ,  Moon Shik Kang ,  Jin Ho Park

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3648 ,  G09G2310/0248 ,  G09G2330/021

Abstract: A display device including: a display panel including pixels and data lines; a data driver configured to apply data voltages to the data lines; an image pattern determiner configured to determine an image pattern based on an input image signal and to generate image pattern information; and a bias current control signal generator configured to generate a bias current control signal for determining a magnitude of a bias current of the data driver based on the image pattern information.

Abstract translation: 一种显示装置，包括：显示面板，包括像素和数据线; 数据驱动器，被配置为向数据线施加数据电压; 图像图案确定器，被配置为基于输入图像信号确定图像图案，并且生成图像图案信息; 以及偏置电流控制信号发生器，被配置为基于所述图像图案信息产生用于确定所述数据驱动器的偏置电流的大小的偏置电流控制信号。

公开(公告)号：US09978332B2

公开(公告)日：2018-05-22

申请号：US14448558

申请日：2014-07-31

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Soon Lee ,  Moon Shik Kang ,  Jin Ho Park

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3648 ,  G09G2310/0248 ,  G09G2330/021

Abstract: A display device including: a display panel including pixels and data lines; a data driver configured to apply data voltages to the data lines; an image pattern determiner configured to determine an image pattern based on an input image signal and to generate image pattern information; and a bias current control signal generator configured to generate a bias current control signal for determining a magnitude of a bias current of the data driver based on the image pattern information.

公开(公告)号：US09711075B2

公开(公告)日：2017-07-18

申请号：US14542960

申请日：2014-11-17

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Soon Lee ,  Sang-Gon Lee

IPC: G09G5/00 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

Abstract: An exemplary embodiment of the present invention provides a display panel including: a display area configured to include a gate line and a data line; and a gate driver connected to one terminal of the gate line, the gate driver including a plurality of stages and being integrated on a substrate to output a gate voltage. The stages are divided into at least two stage groups, a first pair of clock signals including a first clock signal and a first clock-bar signal is applied to a first one of the stage groups, and the first pair of clock signals is not swung for a time period in one frame.