公开(公告)号：US20250117257A1

公开(公告)日：2025-04-10

申请号：US18830998

申请日：2024-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungmin AHN ,  Hong Rak SON ,  Dong-Min SHIN ,  Dae-Yeol YANG ,  JongYoon YOON ,  Jae Hun JANG ,  Se Jung KWON ,  Byeongwook KIM ,  Baeseong PARK ,  Dongsoo LEE

IPC: G06F9/50 ,  H03M13/00 ,  H03M13/13

Abstract: Disclosed is an accelerator device which includes an interface circuit that communicates with an external device, a memory that stores first data received through the interface circuit, a polar encoder that performs polar encoding with respect to the first data provided from the memory and to output a result of the polar encoding as second data, and an accelerator core that loads the second data. The first data are compressed weight data, the second data are decompressed weight data, the accelerator core is configured to perform machine learning-based inference based on the second data, and the first data are variable in length.