公开(公告)号：US20230168707A1

公开(公告)日：2023-06-01

申请号：US17846289

申请日：2022-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choongeui LEE ,  Hyungjin KIM ,  Jonghyun JANG ,  Chulseung LEE

IPC: G06F1/08 ,  G06F1/10

CPC classification number: G06F1/08 ,  G06F1/10

Abstract: A memory controller for a memory device, the memory controller including: a command generator configured to generate a command signal based on a system clock signal, and to generate phase difference information for the command signal; and a memory interface configured to receive the command signal and the phase difference information from the command generator, to adjust a timing of the command signal based on the phase difference information, and transmit the command signal of which the timing is adjusted as a timing adjusted command signal to the memory device.