公开(公告)号：US20200373124A1

公开(公告)日：2020-11-26

申请号：US16706773

申请日：2019-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho YOON ,  Yonghwan KIM ,  Sangwuk PARK ,  Chanhoon PARK ,  Hyuk KIM ,  Edward SUNG

IPC: H01J37/32

Abstract: A semiconductor processing apparatus includes an upper electrode and a substrate on a lower electrode disposed inside the process chamber, a first power generator configured to provide a low-frequency signal to the lower electrode, wherein the low-frequency signal varies between a reference voltage and a first voltage at intervals of a first cycle, a second power generator configured to provide a high-frequency signal to the lower electrode, wherein the high-frequency signal has a sinusoidal waveform that oscillates at intervals of a second cycle shorter than the first cycle, and a direct-current (DC) power generator configured to provide a DC bias to the upper electrode. The high-frequency signal is turned off during at least part of a duration for which the low-frequency signal has the first voltage, and the high-frequency signal is turned on and turned off at intervals of a third cycle different from the first and second cycles.

公开(公告)号：US20240038493A1

公开(公告)日：2024-02-01

申请号：US18380144

申请日：2023-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho YOON ,  Yonghwan KIM ,  Sangwuk PARK ,  Chanhoon PARK ,  Hyuk KIM ,  Edward SUNG

IPC: H01J37/32

CPC classification number: H01J37/32082 ,  H01L21/31144

Abstract: A semiconductor processing apparatus includes an upper electrode and a substrate on a lower electrode disposed inside the process chamber, a first power generator configured to provide a low-frequency signal to the lower electrode, wherein the low-frequency signal varies between a reference voltage and a first voltage at intervals of a first cycle, a second power generator configured to provide a high-frequency signal to the lower electrode, wherein the high-frequency signal has a sinusoidal waveform that oscillates at intervals of a second cycle shorter than the first cycle, and a direct-current (DC) power generator configured to provide a DC bias to the upper electrode. The high-frequency signal is turned off during at least part of a duration for which the low-frequency signal has the first voltage, and the high-frequency signal is turned on and turned off at intervals of a third cycle different from the first and second cycles.