公开(公告)号：US20180166343A1

公开(公告)日：2018-06-14

申请号：US15646300

申请日：2017-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Ho BAE ,  Jaeseok KIM ,  Hoyoung KIM ,  Boun YOON ,  KyungTae LEE ,  Kwansung KIM ,  Eunji PARK

IPC: H01L21/8234

CPC classification number: H01L21/823475 ,  H01L21/823418 ,  H01L21/823437

Abstract: A method of manufacturing a semiconductor device includes forming on a substrate gate electrodes extending in a first direction and spaced apart from each other in a second direction, forming capping patterns on the gate electrodes, forming interlayer dielectric layer filling spaces between adjacent gate electrodes, forming a hardmask on the interlayer dielectric layer with an opening selectively exposing second to fourth capping patterns, using the hardmask as an etch mask to form holes in the interlayer dielectric layer between the second and third gate electrodes and between the third and fourth gate electrodes, forming a barrier layer and a conductive layer in the holes, performing a first planarization to expose the hardmask, performing a second planarization to expose a portion of the barrier layer covering the second to fourth capping patterns, and performing a third planarization to completely expose the first to fourth capping patterns.

公开(公告)号：US20240214703A1

公开(公告)日：2024-06-27

申请号：US18390867

申请日：2023-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunji PARK ,  Jungwook LIM

IPC: H04N25/709 ,  H01L27/146 ,  H04N25/77

CPC classification number: H04N25/709 ,  H01L27/14607 ,  H04N25/77 ,  H04N25/766

Abstract: An image sensor includes a plurality of pixels, each pixel of the plurality of pixels includes, a first photodiode, a second photodiode, a first transfer transistor connected to a first floating diffusion node, a second transfer transistor connected to a second floating diffusion node, a first reset transistor configured to reset the first floating diffusion node with a first reset power supply voltage, a second reset transistor configured to reset the second floating diffusion node with a second reset power supply voltage, a switch transistor connecting the second floating diffusion node to the first floating diffusion node, and a first driving transistor configured to output an output voltage according to a voltage of the first floating diffusion node.