公开(公告)号：US12237324B2

公开(公告)日：2025-02-25

申请号：US18052726

申请日：2022-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jangeun Lee ,  Minjoo Lee ,  Eunyoung Lee ,  Minsik Kim

IPC: H10B12/00 ,  H01L21/02 ,  H01L27/06

Abstract: An integrated circuit device according may include a plurality of gate structures embedded in a substrate, a direct contact on the substrate between the plurality of gate structures, and a bit line electrode layer on the direct contact. The bit line electrode layer has a thickness of about 10 nm to 30 nm. The bit line electrode layer may include a molybdenum tungsten (MoW) alloy including molybdenum (Mo) a range of about 25 at % to about 75 at %.