公开(公告)号：US20240128135A1

公开(公告)日：2024-04-18

申请号：US18331975

申请日：2023-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYOSOO CHOO ,  DAESEOK BYEON ,  WOOSUNG YANG

IPC: H01L21/66 ,  H01L23/00 ,  H01L23/544 ,  H01L25/065

CPC classification number: H01L22/34 ,  H01L22/14 ,  H01L23/544 ,  H01L24/08 ,  H01L25/0657 ,  H01L2224/08148 ,  H01L2225/06565 ,  H01L2924/1438 ,  H01L2924/35121

Abstract: A semiconductor device with a structure in which a plurality of chips are stacked includes: a chip area; a scribe lane at a circumference of the chip area; a dam structure that separates the chip area and the scribe lane; a detection wire that extends from the chip area to the scribe lane by passing through the dam structure; and a detection circuit in the chip area that is electrically connected to the detection wire and is configured to detect a defect in the scribe lane.