公开(公告)号：US20210149762A1

公开(公告)日：2021-05-20

申请号：US16914890

申请日：2020-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kangseok LEE ,  Dong-min SHIN ,  Geunyeoung YU ,  Bohwan JUN ,  Hee Youl KWAK ,  Hong Rak SON

IPC: G06F11/10 ,  H03M13/11 ,  H03M13/35

Abstract: An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.