公开(公告)号：US11442493B2

公开(公告)日：2022-09-13

申请号：US16770561

申请日：2018-11-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunsoo Kim ,  Jungmin Park ,  Yongjun Park ,  Gunjong Bong

IPC: G06F1/08 ,  H04W52/02 ,  H04W56/00

Abstract: Disclosed in various embodiments of the present invention are an electronic device for controlling a clock frequency and an operating method therefor. The electronic device comprises a communication module and a processor, wherein the processor can be configured to check, by using the communication module, a state of a downlink channel of a carrier to be transmitted, determine, on the basis of the channel state, a reference frequency band for a signal to be transmitted through the communication module, determine, as a first clock frequency, a clock frequency for at least one constituent element included in the electronic device if the reference frequency band is a first reference frequency band, and determine, as a second clock frequency, a clock frequency for at least one constituent element included in the electronic device if the reference frequency band is a second reference frequency band. Other embodiments are also possible.

公开(公告)号：US20250080159A1

公开(公告)日：2025-03-06

申请号：US18933668

申请日：2024-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Janghoon HAN ,  Daehee Park ,  Gunjong Bong ,  Yongbeen Yun

IPC: H04B1/58 ,  H04B1/401

Abstract: An electronic device may include: a transceiver may include an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC); a coupler connected to the transceiver through a feedback path; at least one memory storing instructions; and at least one communication processor configured to execute the instructions to: provide a digital transmission signal to the transceiver; receive a digital feedback signal from the transceiver; and obtain a reflection coefficient based on the digital transmission signal and the digital feedback signal. The DAC may be configured to convert the digital transmission signal into an analog signal, and the ADC may be configured to convert a signal into a digital signal to obtain the digital feedback signal, based on sampling information controlled according to a resource block size of the digital transmission signal.