公开(公告)号：US20220406791A1

公开(公告)日：2022-12-22

申请号：US17729024

申请日：2022-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： EUNJUNG KIM ,  HYUNYONG KIM ,  Sangho LEE ,  YONGSEOK AHN ,  JAY-BOK CHOI

IPC: H01L27/108

Abstract: Provided is a semiconductor memory device comprising a device isolation pattern in a substrate and defining first and second active sections spaced apart from each other, wherein a center of the first active section is adjacent to an end of the second active section, a bit line that crosses over the center of the first active section, a bit-line contact between the bit line and the first active section, and a first storage node pad on the end of the second active section. The first storage node pad includes a first pad sidewall and a second pad sidewall. The first pad sidewall is adjacent to the bit-line contact. The second pad sidewall is opposite to the first pad sidewall. When viewed in plan, the second pad sidewall is convex in a direction away from the bit-line contact.