公开(公告)号：US10431595B1

公开(公告)日：2019-10-01

申请号：US16043258

申请日：2018-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han Vit Yang ,  Yong Hoon Son

IPC: H01L27/11582 ,  H01L27/11573 ,  G11C16/04 ,  H01L29/423 ,  H01L23/532 ,  H01L27/1157

Abstract: A memory device includes a substrate having a first source film thereon and an upper stacked structure on the first source film. An electrically conductive channel structure is provided, which extends through the upper stacked structure and the first source film. The channel structure includes a channel pattern, which extends vertically through the upper stacked structure and the first source film, and an information storage pattern on a sidewall of the channel pattern. A second source film is provided, which extends between the first source film and a surface of the substrate. The second source film, which contacts the channel pattern, includes an upward extending protrusion, which extends underneath the information storage pattern. A channel protective film is provided, which extends between at least a portion of the protrusion and at least a portion of the information storage pattern.

公开(公告)号：US10971521B2

公开(公告)日：2021-04-06

申请号：US17034764

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han Vit Yang ,  Yong Hoon Son ,  Moon Jong Kang ,  Hyuk Ho Kwon ,  Sung Soo Ahn ,  So Yoon Lee

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L27/11573 ,  H01L27/11575

Abstract: A three-dimensional semiconductor device includes: a peripheral circuit structure disposed on a lower substrate, and including an internal peripheral pad portion; an upper substrate disposed on the peripheral circuit structure; a stack structure disposed on the upper substrate, and including gate horizontal patterns; a vertical channel structure passing through the stack structure in a first region on the upper substrate; a first vertical support structure passing through the stack structure in a second region on the upper substrate; and an internal peripheral contact structure passing through the stack structure and the upper substrate, and electrically connected to the internal peripheral pad portion, wherein an upper surface of the first vertical support structure is disposed on a different level from an upper surface of the vertical channel structure, and is coplanar with an upper surface of the internal peripheral contact structure.

公开(公告)号：US10804289B2

公开(公告)日：2020-10-13

申请号：US16237844

申请日：2019-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han Vit Yang ,  Yong Hoon Son ,  Moon Jong Kang ,  Hyuk Ho Kwon ,  Sung Soo Ahn ,  So Yoon Lee

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L21/768 ,  H01L23/522 ,  H01L27/11573 ,  H01L27/11575 ,  H01L23/48

Abstract: A three-dimensional semiconductor device includes: a peripheral circuit structure disposed on a lower substrate, and including an internal peripheral pad portion; an upper substrate disposed on the peripheral circuit structure; a stack structure disposed on the upper substrate, and including gate horizontal patterns; a vertical channel structure passing through the stack structure in a first region on the upper substrate; a first vertical support structure passing through the stack structure in a second region on the upper substrate; and an internal peripheral contact structure passing through the stack structure and the upper substrate, and electrically connected to the internal peripheral pad portion, wherein an upper surface of the first vertical support structure is disposed on a different level from an upper surface of the vertical channel structure, and is coplanar with an upper surface of the internal peripheral contact structure.