公开(公告)号：US12217804B2

公开(公告)日：2025-02-04

申请号：US17960630

申请日：2022-10-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongsung Cho ,  Min-Hwi Kim ,  Hosang Cho

IPC: G11C16/26 ,  G11C16/04

Abstract: A cache read method of a nonvolatile memory device including a plurality of page buffer units and cache latches, each page buffer units having a sensing latch and a sensing node line is provided. The method comprises performing a first on-chip valley search (OVS) read on a selected memory cell using a first sensing node line and a first sensing latch of a first page buffer unit of the plurality of page buffer units; storing first data sensed from the selected memory cell in the first sensing latch, the first data based on a result of the first OVS read; dumping the first data to sensing node lines of at least one page buffer unit, excluding the first page buffer unit, from among the plurality of page buffer units; and performing a second OVS read on the selected memory cell using the first sensing latch.