公开(公告)号：US20220139873A1

公开(公告)日：2022-05-05

申请号：US17329230

申请日：2021-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seon Ho LEE ,  Hwail JIN ,  Jongpa HONG

IPC: H01L25/065 ,  H01L25/00

Abstract: A semiconductor package includes a lower semiconductor chip having a lower semiconductor substrate and upper pads on a top surface of the lower semiconductor substrate, an upper semiconductor chip stacked on the lower semiconductor chip, the upper semiconductor chip including an upper semiconductor substrate and solder bumps on a bottom surface of the upper semiconductor substrate, and a curing layer between the lower semiconductor chip and the upper semiconductor chip, the curing layer including a first curing layer adjacent to the upper semiconductor chip, the first curing layer including a first photo-curing agent, and a second curing layer between the first curing layer and the top surface of the lower semiconductor substrate, the second curing layer including a first thermo-curing agent.

公开(公告)号：US20240371835A1

公开(公告)日：2024-11-07

申请号：US18776869

申请日：2024-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongpa HONG ,  Hwail JIN ,  Sang-Sick PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/00

Abstract: Disclosed are semiconductor packages and their fabricating methods. The semiconductor package comprises connection terminals between a first die and a second die. The first die has signal and peripheral regions and includes first vias on the peripheral region. The second die is on the first die and has second vias on positions that correspond to the first vias. The connection terminals connect the second vias to the first vias. The peripheral region includes first regions adjacent to corners of the first die and second regions adjacent to lateral surfaces of the first die. The connection terminals include first connection terminals on the first regions and second connection terminals on the second regions. A sum of areas of the first connection terminals per unit area on the first regions is greater than that of areas of the second connection terminals per unit area on the second regions.

公开(公告)号：US20220406755A1

公开(公告)日：2022-12-22

申请号：US17669773

申请日：2022-02-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongpa HONG ,  Hwail JIN ,  Sang-Sick PARK

IPC: H01L25/065 ,  H01L23/48 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00

Abstract: Disclosed are semiconductor packages and their fabricating methods. The semiconductor package comprises connection terminals between a first die and a second die. The first die has signal and peripheral regions and includes first vias on the peripheral region. The second die is on the first die and has second vias on positions that correspond to the first vias. The connection terminals connect the second vias to the first vias. The peripheral region includes first regions adjacent to corners of the first die and second regions adjacent to lateral surfaces of the first die. The connection terminals include first connection terminals on the first regions and second connection terminals on the second regions. A sum of areas of the first connection terminals per unit area on the first regions is greater than that of areas of the second connection terminals per unit area on the second regions.