公开(公告)号：US11010532B2

公开(公告)日：2021-05-18

申请号：US16794045

申请日：2020-02-18

申请人： Samsung Electronics Co., Ltd.

发明人： Alexander Schmidt ,  Dong-Gwan Shin ,  Anthony Payet ,  Hyoung Soo Ko ,  Seok Hoon Kim ,  Hyun-Kwan Yu ,  Si Hyung Lee ,  In Kook Jang

IPC分类号： G06F30/367 ,  G06F30/398 ,  H01L27/02

摘要： A simulation method includes storing a plurality of structure parameters of transistors for a semiconductor chip, imaging generating a first local layout which includes a first structure parameter extracted from a semiconductor device included in the first local layout, the first structure parameter being an actual parameter determined using the imaging equipment, generating second to n-th local layouts by modifying the first structure parameter included in the first local layout, wherein the second to n-th local layouts respectively have second to n-th structure parameters modified from the first structure parameter, calculating first to n-th effective density factors (EDF) respectively for the first to n-th structure parameters, determining a first effective open silicon density for a first chip using the first to n-th effective density factors and a layout of the first chip, and calculating first to m-th epitaxy times for first to m-th effective open silicon densities.