Semiconductor devices
    1.
    发明授权

    公开(公告)号:US11942551B2

    公开(公告)日:2024-03-26

    申请号:US17519967

    申请日:2021-11-05

    摘要: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.

    SEMICONDUCTOR DEVICE
    2.
    发明公开

    公开(公告)号:US20230145260A1

    公开(公告)日:2023-05-11

    申请号:US17831513

    申请日:2022-06-03

    摘要: A semiconductor device including: a plurality of fin-shaped patterns spaced apart from each other in a first direction and extending in a second direction on a substrate; a field insulating layer covering sidewalls of the plurality of fin-shaped patterns and disposed between the fin-shaped patterns; a source/drain pattern connected to the plurality of fin-shaped patterns on the field insulating layer, the source/drain pattern including bottom surfaces respectively connected to the fin-shaped patterns, and at least one connection surface connecting the bottom surfaces to each other; and a sealing insulating pattern extending along the connection surface of the source/drain pattern and an upper surface of the field insulating layer, wherein the source/drain pattern includes a silicon-germanium pattern doped with a p-type impurity.

    Method for domain shading, and devices operating the same
    4.
    发明授权
    Method for domain shading, and devices operating the same 有权
    域阴影的方法,以及操作相同的设备

    公开(公告)号:US09552618B2

    公开(公告)日:2017-01-24

    申请号:US14534441

    申请日:2014-11-06

    IPC分类号: G06T17/20 G06T1/20 G06T15/00

    CPC分类号: G06T1/20 G06T15/005 G06T17/20

    摘要: A method for domain shading may include analyzing graphics state data, and generating all first primitives through a single-pass domain shading or generating only second primitives which are visible among the first primitives through a two-pass domain shading based on a result of the analysis.

    摘要翻译: 域阴影的方法可以包括分析图形状态数据,以及通过单遍域阴影生成所有第一原语,或者仅通过基于分析结果的双遍域阴影生成第一原语中可见的第二原语 。

    Semiconductor device
    5.
    发明授权

    公开(公告)号:US12021131B2

    公开(公告)日:2024-06-25

    申请号:US17460446

    申请日:2021-08-30

    摘要: A semiconductor device includes an active pattern including a lower pattern and a plurality of sheet patterns; a gate structure disposed on the lower pattern and surrounding the plurality of sheet patterns; and a source/drain pattern filling a source/drain recess formed on one side of the gate structure. The source/drain pattern includes a first semiconductor pattern extending along the source/drain recess and contacting the lower pattern, a second and third semiconductor patterns sequentially disposed on the first semiconductor pattern, a lower surface of the third semiconductor pattern is disposed below a lower surface of a lowermost sheet pattern, a side surface of the third semiconductor pattern includes a planar portion, and a thickness of the second semiconductor pattern on the lower surface of the third semiconductor pattern is different from a thickness of the second semiconductor pattern on the planar portion of the side surface of the third semiconductor pattern.

    Semiconductor device
    7.
    发明授权

    公开(公告)号:US10930668B2

    公开(公告)日:2021-02-23

    申请号:US16272265

    申请日:2019-02-11

    摘要: A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane.

    Method of generating tessellation data and apparatus for performing the same
    9.
    发明授权
    Method of generating tessellation data and apparatus for performing the same 有权
    生成细分数据的方法及其执行方法

    公开(公告)号:US09460559B2

    公开(公告)日:2016-10-04

    申请号:US14306782

    申请日:2014-06-17

    IPC分类号: G06T17/20 G06T9/00

    摘要: A method of generating tessellation data include analyzing patch data of each of a plurality of patches; generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing; and compressing the non-shared data and the attribute data.

    摘要翻译: 生成细分数据的方法包括分析多个贴片中的每一个的贴片数据; 根据分析结果生成补丁共享的共享数据,不是由补丁共享的非共享数据,以及来自补丁数据的每个补丁的控制点的属性的属性数据; 并压缩非共享数据和属性数据。