公开(公告)号：US11488910B2

公开(公告)日：2022-11-01

申请号：US17036702

申请日：2020-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Kun Jee ,  Il Hwan Kim ,  Un Byoung Kang

IPC: H01L23/538 ,  H01L21/48 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/11 ,  H01L25/07

Abstract: A semiconductor package includes a silicon substrate including a cavity and a plurality of through holes spaced apart from the cavity, a first semiconductor chip in the cavity, a plurality of conductive vias in the plurality of through holes, a first redistribution layer on the silicon substrate and connected to the first semiconductor chip and the conductive vias, and a second redistribution layer below the silicon substrate and connected to the first semiconductor chip and the plurality of conductive vias.

公开(公告)号：US11315802B2

公开(公告)日：2022-04-26

申请号：US16293697

申请日：2019-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Il Hwan Kim ,  Un Byoung Kang ,  Chung Sun Lee

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L21/683 ,  H01L23/00

Abstract: A method of manufacturing a semiconductor package includes forming a plurality of trenches at a first surface of a silicon substrate, forming a conductive pad inside each of the plurality of trenches, forming a redistribution layer on the first surface of the silicon substrate, forming an external connection terminal on a first surface of the redistribution layer, removing the silicon substrate to expose each conductive pad, mounting a semiconductor chip to be connected to the conductive pads, and forming an encapsulant to cover at least one surface of the semiconductor chip.