公开(公告)号：US20230005935A1

公开(公告)日：2023-01-05

申请号：US17713327

申请日：2022-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yanghee LEE ,  Jonghyuk PARK ,  Ilyoung YOON ,  Boun YOON ,  Jeehwan HEO

IPC: H01L27/108

Abstract: A semiconductor device may include a substrate, a patterned structure, a filling pattern, and a conductive spacer. The substrate may include a semiconductor chip region and an overlay region. The patterned structure may include bit line structures spaced by a first distance on the semiconductor region, define a first trench and a second trench on first and second regions of the overlay region, and include key structures on the second region and spaced apart by the second trench. The filling pattern may fill lower portions of the first and second trenches on the first and second regions. The first region may be an edge portion of the overlay region. The second region may be a central portion of the overlay region. The conductive spacer may contact an upper surface of the filling pattern and may be on an upper sidewall of each of the first and second trenches.