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公开(公告)号:US20220171420A1
公开(公告)日:2022-06-02
申请号:US17385010
申请日:2021-07-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeongpyo PARK , TAE-HWANG KONG , JUNHYEOK YANG , JOOSEONG KIM
Abstract: An electronic device including: a reference voltage generator circuit to generate a reference voltage based on a first and second voltage, the reference voltage generator circuit including: a first current source to supply a first current to each of a first and second node; an amplifier to amplify a difference between the first voltage of the first node and the second voltage of the second node and to output a difference voltage corresponding to the amplified difference; a first bipolar junction transistor (BJT) connected to the first node; a first resistor connected to the second node; a second BJT connected between the first resistor and ground; a second resistor connected between the second node and ground; and a first transistor to be supplied with a second current from the first current source; and an adaptive cascode circuit to generate a bias voltage applied to a gate of the first transistor.
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公开(公告)号:US20220190720A1
公开(公告)日:2022-06-16
申请号:US17477813
申请日:2021-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeongpyo PARK , Taehwang KONG , Junhyeok YANG , Donghoon JUNG
Abstract: A DC-DC converter including a switching buck regulator including a first power switch connected to a first power node, a second power switch connected to a second power node, a driver configured to drive the first and second power switches, an output filtering inductor connected to a node between the first and second power switches, and an output filtering capacitor connected to the output filtering inductor, a controller configured to compensate for an output signal of the switching buck regulator in a time domain using a reference voltage, and a feed forward circuit connected between the switching buck regulator and the controller, and including a first buffer, a second buffer, an RC filter, and an adder may be provided. Accordingly, the DC-DC converter can reduce a delay of a compensation circuit, improve transient response characteristics of the switching buck regulator, and further improve the performance of the DC-DC converter.
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公开(公告)号:US20220100218A1
公开(公告)日:2022-03-31
申请号:US17315621
申请日:2021-05-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: DONGHOON JUNG , TAE-HWANG KONG , SANGHO KIM , JUNHYEOK YANG , Jeongpyo PARK
Abstract: Disclosed is an electronic device, which includes an amplifier circuit that receives a feedback voltage and a reference voltage and amplifies a difference between the feedback voltage and the reference voltage to output an amplified difference voltage, an analog-to-digital converter that converts the amplified difference voltage to a digital code including two or more bits, and low-dropout (LDO) regulators that outputs output voltages based on the digital code. Each of the LDO regulators includes power transistors outputting a corresponding output voltage of the output voltages, drives one of the power transistors in a switching state, and drives each of remaining power transistors in a turned-on state or a turned-off state.
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公开(公告)号:US20240019886A1
公开(公告)日:2024-01-18
申请号:US18374028
申请日:2023-09-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeongpyo PARK , TAE-HWANG KONG , JUNHYEOK YANG , JOOSEONG KIM
Abstract: An electronic device including: a reference voltage generator circuit to generate a reference voltage based on a first and second voltage, the reference voltage generator circuit including: a first current source to supply a first current to each of a first and second node; an amplifier to amplify a difference between the first voltage of the first node and the second voltage of the second node and to output a difference voltage corresponding to the amplified difference; a first bipolar junction transistor (BJT) connected to the first node; a first resistor connected to the second node; a second BJT connected between the first resistor and ground; a second resistor connected between the second node and ground; and a first transistor to be supplied with a second current from the first current source; and an adaptive cascode circuit to generate a bias voltage applied to a gate of the first transistor.
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