公开(公告)号：US20130224920A1

公开(公告)日：2013-08-29

申请号：US13736457

申请日：2013-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongsang JEONG ,  Vladimir URAZAEV ,  Jin Ha JEONG ,  Changhun LEE

IPC: H01L29/66

CPC classification number: H01L29/66666 ,  H01L21/823814 ,  H01L21/82385 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66553 ,  H01L29/66621 ,  H01L29/7834

Abstract: A method of fabricating a semiconductor device may include patterning a substrate to form trenches, forming a sacrificial layer to cover inner surfaces of the trenches, the sacrificial layer having a single-layered structure, forming sacrificial patterns by isotropically etching the sacrificial layer such that the sacrificial layer remains on bottom surfaces of the trenches, forming lightly doped regions in sidewalls of the trenches using the sacrificial patterns as an ion mask, removing the sacrificial patterns, and sequentially forming a gate insulating layer and a gate electrode layer in the trenches.

Abstract translation: 制造半导体器件的方法可以包括图案化衬底以形成沟槽，形成牺牲层以覆盖沟槽的内表面，牺牲层具有单层结构，通过各向同性蚀刻牺牲层形成牺牲图案，使得 牺牲层保留在沟槽的底表面上，使用牺牲图案作为离子掩模在沟槽的侧壁中形成轻掺杂区域，去除牺牲图案，以及在沟槽中顺序地形成栅极绝缘层和栅极电极层。