公开(公告)号：US20240295963A1

公开(公告)日：2024-09-05

申请号：US18310741

申请日：2023-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Raghu Vamsi Krishna TALANKI ,  Archita KHARE ,  Eldho P. MATHEW ,  Jin In SO ,  Jong-Geon LEE ,  Venkata Ravi Shankar JONNALAGADDA ,  Vishnu Charan THUMMALA

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F3/0673

Abstract: The present disclosure relates to field of Dual In-Line Memory Modules that discloses method and system for generating memory maps. The method comprises detecting, by computing system, at least one of DIMM and one or more Dynamic Random Access Memory (DRAM) chips associated with computing system. The one or more accelerators are configured in at least one of DIMM and one or more DRAM chips. Further, the method includes determining accelerator information for each of one or more accelerators via at least one of Serial Presence Detect (SPD) and Multi-Purpose Register (MPR) associated with at least one of DIMM and one or more DRAM chips. Method includes generating unique memory map for each of one or more accelerators based on accelerator information of corresponding one or more accelerators. As a result, performance of computing system may be improved as accelerator capabilities of one or more accelerators are effectively utilized.

公开(公告)号：US20220365726A1

公开(公告)日：2022-11-17

申请号：US17746562

申请日：2022-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eldho Mathew PATHIYAKKARA THOMBRA ,  Prashant Vishwanath MAHENDRAKAR ,  Jin In SO ,  Jong-Geon LEE

IPC: G06F3/06

Abstract: A method for operating a Near Memory Processing (NMP) Dual In-line Memory Module (DIMM) for DIMM-to-DIMM communication is provided. The NMP DIMM includes one or more ports for communicative connection to other NMP DIMMs. The method includes parsing, by one NMP DIMM, a NMP command received from a processor of a host platform, identifying data dependencies on one or more other NMP DIMMs based on the parsing, establishing communication with the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, receiving data from the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, processing the NMP command using the data received from one of the one or more other NMP DIMMs and data present in the one NMP DIMM, and sending a NMP command completion notification to the processor of the host platform.