SEMICONDUCTOR DEVICES HAVING IMAGE SENSOR AND MEMORY DEVICE OPERATION MODES
    1.
    发明申请
    SEMICONDUCTOR DEVICES HAVING IMAGE SENSOR AND MEMORY DEVICE OPERATION MODES 有权
    具有图像传感器和存储器件操作模式的半导体器件

    公开(公告)号:US20140104263A1

    公开(公告)日:2014-04-17

    申请号:US14050993

    申请日:2013-10-10

    IPC分类号: G09G3/36

    摘要: A semiconductor device may include a plurality of banks; and a control unit configured to receive a command from an external device and independently control the plurality of banks according to the received command. Each bank comprises a pixel array including a plurality of pixels; a row decoder configured to activate word lines connected to the plurality of pixels under control of the control unit; a column decoder configured to activate bit lines connected to the plurality of pixels under control of the control unit; a sense amplifier and write driver configured to control and detect respective voltages of the activated bit lines to provide respective amplified voltages; and an input/output buffer configured to output data states of the pixels based on the respective amplified voltages. Related methods of operation are also discussed.

    摘要翻译: 半导体器件可以包括多个堤; 以及控制单元,被配置为从外部设备接收命令,并根据所接收的命令独立地控制所述多个存储体。 每个存储体包括包括多个像素的像素阵列; 行解码器,被配置为在所述控制单元的控制下激活连接到所述多个像素的字线; 列解码器,被配置为在所述控制单元的控制下激活连接到所述多个像素的位线; 读出放大器和写入驱动器,被配置为控制和检测激活的位线的相应电压以提供相应的放大电压; 以及输入/输出缓冲器,被配置为基于相应的放大电压输出像素的数据状态。 还讨论了相关的操作方法。

    Semiconductor devices having image sensor and memory device operation modes
    2.
    发明授权
    Semiconductor devices having image sensor and memory device operation modes 有权
    具有图像传感器和存储器件操作模式的半导体器件

    公开(公告)号:US09082368B2

    公开(公告)日:2015-07-14

    申请号:US14050993

    申请日:2013-10-10

    摘要: A semiconductor device may include a plurality of banks; and a control unit configured to receive a command from an external device and independently control the plurality of banks according to the received command. Each bank comprises a pixel array including a plurality of pixels; a row decoder configured to activate word lines connected to the plurality of pixels under control of the control unit; a column decoder configured to activate bit lines connected to the plurality of pixels under control of the control unit; a sense amplifier and write driver configured to control and detect respective voltages of the activated bit lines to provide respective amplified voltages; and an input/output buffer configured to output data states of the pixels based on the respective amplified voltages. Related methods of operation are also discussed.

    摘要翻译: 半导体器件可以包括多个堤; 以及控制单元,被配置为从外部设备接收命令,并根据所接收的命令独立地控制所述多个存储体。 每个存储体包括包括多个像素的像素阵列; 行解码器,被配置为在所述控制单元的控制下激活连接到所述多个像素的字线; 列解码器,被配置为在所述控制单元的控制下激活连接到所述多个像素的位线; 读出放大器和写入驱动器,被配置为控制和检测激活的位线的相应电压以提供相应的放大电压; 以及输入/输出缓冲器,被配置为基于相应的放大电压输出像素的数据状态。 还讨论了相关的操作方法。