公开(公告)号：US10192624B2

公开(公告)日：2019-01-29

申请号：US15495072

申请日：2017-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho Song ,  Se-heon Baek ,  Yong-sung Cho

IPC: G11C16/04 ,  G11C16/24 ,  G11C16/12 ,  G11C16/26 ,  G11C16/30

Abstract: A non-volatile memory device may include a memory cell array including a plurality of planes, a page buffer connected to the memory cell array and corresponding to each of the plurality of planes, and a decoupling circuit. The page buffer is configured to receive a bit line voltage control signal (BLSHF) via a first node. The decoupling circuit is connected to the first node. The decoupling circuit includes at least one decoupling capacitor configured to execute charge sharing via the first node.

公开(公告)号：US10600488B2

公开(公告)日：2020-03-24

申请号：US16186840

申请日：2018-11-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho Song ,  Se-heon Baek ,  Yong-sung Cho

IPC: G11C16/04 ,  G11C16/24 ,  G11C16/12 ,  G11C16/26 ,  G11C16/30

Abstract: A non-volatile memory device may include a memory cell array including a plurality of planes, a page buffer connected to the memory cell array and corresponding to each of the plurality of planes, and a decoupling circuit. The page buffer is configured to receive a bit line voltage control signal (BLSHF) via a first node. The decoupling circuit is connected to the first node. The decoupling circuit includes at least one decoupling capacitor configured to execute charge sharing via the first node.