公开(公告)号：US20240313782A1

公开(公告)日：2024-09-19

申请号：US18410351

申请日：2024-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Koog KIM ,  Junhoe KIM ,  Gyuyoung PARK ,  Gwanhyeob KOH ,  Kilho LEE

IPC: H03K19/23 ,  H03K19/18

CPC classification number: H03K19/23 ,  H03K19/18

Abstract: An operating method of a chaotic computer including a chaotic logic device includes setting a first initial value based on a first initial state corresponding to a first logical operation, applying the set first initial value to the chaotic logic device, setting a first input value to be applied to the chaotic logic device based on first input data, applying the first input value to the chaotic logic device, generating a chaos signal to have the chaotic logic device operate in a chaotic mode, applying the chaos signal to the chaotic logic device, and measuring a first output value from the chaotic logic device operating based on the first input value and the chaos signal, and generating first output data based on the first output value. The chaotic logic device includes a magnetic thin film configured to have spin soliton formed therein.

公开(公告)号：US20250107102A1

公开(公告)日：2025-03-27

申请号：US18620469

申请日：2024-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhoe KIM ,  Kilho LEE ,  Shin KWON ,  Hyeonah JO

IPC: H10B61/00 ,  G01R33/09 ,  H10N50/10

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a first lower insulating layer disposed on the cell region and extending onto the peripheral region, a second lower insulating layer disposed on the first lower insulating layer on the cell region and extending onto the first lower insulating layer on the peripheral region, data storage patterns disposed on the second lower insulating layer on the cell region, a cell insulating layer disposed on the second lower insulating layer on the cell region and covering the data storage patterns, and a peripheral insulating layer disposed on the second lower insulating layer on the peripheral region and including a material different from the cell insulating layer. A thickness of the second lower insulating layer on the peripheral region is smaller than a maximum thickness of the second lower insulating layer on the cell region.