公开(公告)号：US11314915B2

公开(公告)日：2022-04-26

申请号：US16859323

申请日：2020-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Kim ,  Byungmoo Kim ,  Jaehwan Kim ,  Junsu Jeon

IPC: G06F30/30 ,  G06F30/392 ,  G06F30/398

Abstract: A method of designing a layout of a semiconductor device includes determining from among a plurality of integrated circuit (IC) blocks in the semiconductor device a selection IC block for which a layout is to be changed, changing an spacing interval at which fin structures included in the selection IC block are spaced apart from each other in a first direction from a first spacing interval to a second spacing interval, and determining in the selection IC block locations of source/drain regions connected to the fin structures spaced apart from each other in the first direction at the second spacing interval.