-
公开(公告)号:US20230070191A1
公开(公告)日:2023-03-09
申请号:US17728421
申请日:2022-04-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sun-Ae KIM , Seong Woon KIM , Kil Whan LEE , Sang Hoon LEE , Yong Kwon CHO , Sang Hoon HA
Abstract: A system on chip and a mobile device are provided. The mobile device comprises a processor configured to receive raw image data, process the raw image data into floating-point format image data, and output the floating-point format image data, a memory configured to store therein the floating-point format image data, and a display processing unit configured to receive the floating-point format image data stored in the memory therefrom, and perform high dynamic range (HDR) processing on the floating-point format image data.
-
公开(公告)号:US20230169909A1
公开(公告)日:2023-06-01
申请号:US17867033
申请日:2022-07-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seong Woon KIM , Kil Whan LEE , Sun-Ae KIM , Sang Hoon LEE , Yong Kwon CHO , Sang Hoon HA
IPC: G09G3/20
CPC classification number: G09G3/2096 , G09G2360/18 , G09G2360/12
Abstract: A display controller includes a resource controller configured to receive layer information about each of a first layer and a second layer that are output at different times through a display panel during a unit frame. The display controller includes a data input direct memory access (DMA) configured to receive first image data corresponding to the first layer and second image data corresponding to the second layer, and a hardware resource configured to receive the first and second image data from the data input DMA, process the received first and second image data according to the layer information, and generate first layer data of the first layer and second layer data of the second layer. The resource controller is configured to control the data input DMA according to the layer information to determine an order in which the first and second image data are provided to the hardware resource.
-
公开(公告)号:US20190238817A1
公开(公告)日:2019-08-01
申请号:US16181957
申请日:2018-11-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Ho JUN , Kil Whan LEE
Abstract: An image processing device includes a multimedia intellectual property (IP) block which processes image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) which compresses the image data to generate compressed data and stores the compressed data in the memory. The frame buffer compressor includes a logic circuit which controls a compression sequence of the first component and the second component of the image data.
-
-