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1.
公开(公告)号:US20230015367A1
公开(公告)日:2023-01-19
申请号:US17944379
申请日:2022-09-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Raheel Azmat , Sidharth Rastogi , Chul-hong Park , Jae-seok Yang , Kwan-young Chun
IPC: G06F30/327 , H01L27/02 , G06F30/398
Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.
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2.
公开(公告)号:US20200057830A1
公开(公告)日:2020-02-20
申请号:US16401820
申请日:2019-05-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Raheel Azmat , Sidharth Rastogi , Chul-hong Park , Jae-seok Yang , Kwan-young Chun
Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.
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公开(公告)号:US10361198B2
公开(公告)日:2019-07-23
申请号:US15603577
申请日:2017-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sidharth Rastogi , Subhash Kuchanuri , Raheel Azmat , Pan-jae Park , Chul-hong Park , Jae-seok Yang , Kwan-young Chun
IPC: H01L27/092 , H01L23/535 , H01L29/06 , H01L29/49 , H01L27/02 , H01L29/78 , H01L29/417 , H01L21/8238 , H01L27/118
Abstract: An integrated circuit device includes a substrate including a fin active region extending in a first direction, a gate line intersecting the fin active region and extending in a second direction perpendicular to the first direction, a power line electrically connected to source/drain regions at sides of the gate line on the fin active region, a pair of dummy gate lines intersecting the fin active region and extending in the second direction, and a device separation structure electrically connected to the pair of dummy gate lines and including a lower dummy contact plug between the pair of dummy gate lines on the fin active region and electrically connected to the power line, and an upper dummy contact plug on the lower dummy contact plug and on the pair of dummy gate lines to electrically connect the lower dummy contact plug to the pair of dummy gate lines.
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4.
公开(公告)号:US11868691B2
公开(公告)日:2024-01-09
申请号:US17944379
申请日:2022-09-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Raheel Azmat , Sidharth Rastogi , Chul-hong Park , Jae-seok Yang , Kwan-young Chun
IPC: G06F30/327 , H01L27/02 , G06F30/398
CPC classification number: G06F30/327 , G06F30/398 , H01L27/0207
Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.
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公开(公告)号:US10903213B2
公开(公告)日:2021-01-26
申请号:US16453645
申请日:2019-06-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sidharth Rastogi , Subhash Kuchanuri , Raheel Azmat , Pan-jae Park , Chul-hong Park , Jae-seok Yang , Kwan-young Chun
IPC: H01L27/092 , H01L27/02 , H01L21/76 , H01L21/768 , H01L23/535 , H01L29/06 , H01L29/49 , H01L29/78 , H01L29/417 , H01L21/8238 , H01L27/118
Abstract: An integrated circuit device includes a substrate including a fin active region extending in a first direction, a gate line intersecting the fin active region and extending in a second direction perpendicular to the first direction, a power line electrically connected to source/drain regions at sides of the gate line on the fin active region, a pair of dummy gate lines intersecting the fin active region and extending in the second direction, and a device separation structure electrically connected to the pair of dummy gate lines and including a lower dummy contact plug between the pair of dummy gate lines on the fin active region and electrically connected to the power line, and an upper dummy contact plug on the lower dummy contact plug and on the pair of dummy gate lines to electrically connect the lower dummy contact plug to the pair of dummy gate lines.
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