公开(公告)号：US11182166B2

公开(公告)日：2021-11-23

申请号：US16561004

申请日：2019-09-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Madhu Saravana Sibi Govindan ,  Fuzhou Zou ,  Anhdung Ngo ,  Wichaya Top Changwatchai ,  Monika Tkaczyk ,  Gerald David Zuraski, Jr.

IPC: G06F9/38 ,  G06F9/48 ,  G06F9/54

Abstract: According to one general aspect, an apparatus may include a branch prediction circuit configured to predict if a branch instruction will be taken or not. The apparatus may include a branch target buffer circuit configured to store a memory segment empty flag that indicates whether or not the memory segment after a target address includes at least one other branch instruction, wherein the memory segment empty flag was created during a commit stage of a prior occurrence of the branch instruction. The branch prediction circuit may be configured to skip over the memory segment if the memory segment empty flag indicates a lack of other branch instruction(s).

公开(公告)号：US11169810B2

公开(公告)日：2021-11-09

申请号：US16374743

申请日：2019-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ryan J. Hensley ,  Fuzhou Zou ,  Monika Tkaczyk ,  Eric C. Quinnell ,  James David Dundas ,  Madhu Saravana Sibi Govindan

IPC: G06F9/30 ,  G06F9/38

Abstract: According to one general aspect, an apparatus may include an instruction fetch unit circuit configured to retrieve instructions from a memory. The apparatus may include an instruction decode unit configured to convert instructions into one or more micro-operations that are provided to an execution unit circuit. The apparatus may also include a micro-operation cache configured to store micro-operations. The apparatus may further include a branch prediction circuit configured to: determine when a kernel of instructions is repeating, store at least a portion of the kernel within the micro-operation cache, and provide the stored portion of the kernel to the execution unit circuit without the further aid of the instruction decode unit circuit.