公开(公告)号：US09230610B2

公开(公告)日：2016-01-05

申请号：US14336689

申请日：2014-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi-Young Woo ,  Myong-Jae Kim

IPC: G11C7/00 ,  G11C5/02 ,  G11C11/406 ,  G11C8/12 ,  G11C29/44

CPC classification number: G11C5/025 ,  G11C8/12 ,  G11C11/40615 ,  G11C11/40618 ,  G11C2029/4402

Abstract: Provides is a multi-chip package including a plurality of semiconductor memory devices. Each of semiconductor memory devices includes a register and a control circuit. The register is configured to store start sequence information representing start of execution of a refresh operation in the multi-chip package. The control circuit is configured to control start of the execution of the refresh operation in response to the start sequence information stored in the register. Since the start of the execution of the refresh operation is performed in sequence of respective semiconductor memory devices according to the start sequence information stored in the register, consumption of peak current may be reduced in a power saving mode.

Abstract translation: 提供一种包括多个半导体存储器件的多芯片封装。 每个半导体存储器件包括寄存器和控制电路。 寄存器被配置为存储表示在多芯片封装中执行刷新操作的开始顺序信息。 控制电路被配置为响应于存储在寄存器中的开始顺序信息来控制刷新操作的执行开始。 由于根据存储在寄存器中的开始顺序信息按照各个半导体存储器件的顺序执行刷新操作的开始，所以在省电模式下可以降低峰值电流的消耗。