公开(公告)号：US20240422987A1

公开(公告)日：2024-12-19

申请号：US18398336

申请日：2023-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Hwan Lee ,  Myung Hun Woo ,  Dae Won Ha

IPC: H10B51/30 ,  H10B51/40

Abstract: There is provided a semiconductor memory device comprising: a first word line; a second word line spaced apart from the first word line, a back gate electrode between the first word line and the second word line; a first channel pattern between the first word line and the back gate electrode; a second channel pattern between the second word line and the back gate electrode; a first gate insulating film between the first word line and the first channel pattern; a second gate insulating film between the second word line and the second channel pattern; a first bit line on the first channel pattern and the second channel pattern, wherein the first bit line is connected to the first channel pattern; and a second bit line on the first channel pattern and the second channel pattern, wherein the second bit line is connected to the second channel pattern.