公开(公告)号：US20180089356A1

公开(公告)日：2018-03-29

申请号：US15692291

申请日：2017-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Young PARK ,  Myung Jin CHOI

IPC: G06F17/50

Abstract: A method of designing a semiconductor device including a memory device, a buffer, and a plurality of head circuits connected to the buffer is disclosed. The method includes generating a layout pattern of a power line of the semiconductor device, generating an improved layout pattern of a pre-routing line that connects the buffer to the head circuits, and generating a layout pattern of signal lines of the semiconductor device. The signal lines include both normal signal lines and signal lines for a central clock of the semiconductor device. A layout of the semiconductor device includes a plurality of layers.