公开(公告)号：US20160118331A1

公开(公告)日：2016-04-28

申请号：US14695281

申请日：2015-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-kuk KIM ,  Chan-mi LEE ,  Sang-kwan KIM ,  Young-wook PARK

IPC: H01L23/528 ,  H01L27/088

CPC classification number: H01L27/10894 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate including a cell array region having a first active region and a peripheral circuit region having a second active region, an insulating layer pattern on the substrate and including a hole corresponding with the first active region, a DC conductive pattern in the hole, connected to the first active region, and buried in the substrate, a bit line connected to the DC conductive pattern and including a first bit line conductive pattern contacting the DC conductive pattern and covering a top surface of the insulating layer pattern, and a gate insulating layer and a gate electrode structure on the second active region, the gate electrode structure including a gate conductive pattern and a first gate electrode conductive pattern, the first gate electrode conductive pattern including a same material as the first bit line conductive pattern.

Abstract translation: 一种半导体器件包括：衬底，包括具有第一有源区的单元阵列区和具有第二有源区的外围电路区，衬底上的绝缘层图案，并且包括与第一有源区对应的空穴; DC导电图案， 所述孔连接到所述第一有源区并且埋入所述衬底中，位线连接到所述DC导电图案，并且包括接触所述DC导电图案并覆盖所述绝缘层图案的顶表面的第一位线导电图案，以及 栅极绝缘层和栅极电极结构，所述栅电极结构包括栅极导电图案和第一栅电极导电图案，所述第一栅电极导电图案包括与所述第一位线导电图案相同的材料。