INTEGRATED CIRCUIT LAYOUTS AND METHODS TO IMPROVE PERFORMANCE
    1.
    发明申请
    INTEGRATED CIRCUIT LAYOUTS AND METHODS TO IMPROVE PERFORMANCE 审中-公开
    集成电路和提高性能的方法

    公开(公告)号:US20150186586A1

    公开(公告)日:2015-07-02

    申请号:US14286968

    申请日:2014-05-23

    CPC classification number: G06F17/5072

    Abstract: An embodiment includes a method, comprising: receiving a netlist associated with an integrated circuit; identifying a parameter of a cell in the netlist; associating the cell with a reserved area in response to the parameter; and placing the cell in a layout for the integrated circuit with the reserved area.

    Abstract translation: 实施例包括一种方法,包括:接收与集成电路相关联的网表; 识别网表中的小区的参数; 响应于参数将该单元与保留区域相关联; 并将该单元放置在具有保留区域的集成电路的布局中。

Patent Agency Ranking