INTEGRATED CIRCUIT LAYOUTS AND METHODS TO IMPROVE PERFORMANCE
    1.
    发明申请
    INTEGRATED CIRCUIT LAYOUTS AND METHODS TO IMPROVE PERFORMANCE 审中-公开
    集成电路和提高性能的方法

    公开(公告)号:US20150186586A1

    公开(公告)日:2015-07-02

    申请号:US14286968

    申请日:2014-05-23

    CPC classification number: G06F17/5072

    Abstract: An embodiment includes a method, comprising: receiving a netlist associated with an integrated circuit; identifying a parameter of a cell in the netlist; associating the cell with a reserved area in response to the parameter; and placing the cell in a layout for the integrated circuit with the reserved area.

    Abstract translation: 实施例包括一种方法,包括:接收与集成电路相关联的网表; 识别网表中的小区的参数; 响应于参数将该单元与保留区域相关联; 并将该单元放置在具有保留区域的集成电路的布局中。

    INTEGRATED CIRCUITS WITH INTERNAL PADS
    2.
    发明申请
    INTEGRATED CIRCUITS WITH INTERNAL PADS 有权
    内部集成电路

    公开(公告)号:US20150145122A1

    公开(公告)日:2015-05-28

    申请号:US14267872

    申请日:2014-05-01

    Abstract: An embodiment includes an integrated circuit, comprising: a substrate; a first circuit formed on the substrate and coupled to a plurality of first pads on the substrate; and a second circuit formed on the substrate and coupled to a plurality of second pads on the substrate. The first pads are formed on a perimeter of the substrate; and the second pads extend from the perimeter of the substrate towards an interior of the substrate.

    Abstract translation: 一个实施例包括集成电路,包括:衬底; 形成在所述衬底上并耦合到所述衬底上的多个第一焊盘的第一电路; 以及形成在所述衬底上并耦合到所述衬底上的多个第二焊盘的第二电路。 第一焊盘形成在衬底的周边上; 并且第二焊盘从衬底的周边延伸到衬底的内部。

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