公开(公告)号：US20240154618A1

公开(公告)日：2024-05-09

申请号：US18300692

申请日：2023-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungkeun YOON ,  Seijoon KIM ,  Hyunsoo KIM ,  Chang-Woo SHIN

IPC: H03M1/06 ,  H03M1/12 ,  H03M1/46

CPC classification number: H03M1/0648 ,  H03M1/125 ,  H03M1/462

Abstract: A method of optimizing a quantization step size of an analog-to-digital converter (ADC) based on a number of crossbar arrays of a computing device includes: generating a first mapping relationship between the quantization step size of the ADC and a first root mean square error, the first root mean square error reflecting a quantization error and a clipping error, wherein the generating the first graph is based on use of only a single crossbar array; generating a second mapping relationship between the quantization step size of the ADC and a second root mean square error, the second root mean square error reflecting a quantization error, wherein the generating the second mapping is based on a uniform distribution of a total sum of quantization errors; and determining the quantization step size of the ADC based on the first mapping relationship and the second mapping relationship.

公开(公告)号：US20240144653A1

公开(公告)日：2024-05-02

申请号：US18310075

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunsoo KIM ,  Seijoon KIM ,  Minyoung MUN ,  Seungkeun YOON

IPC: G06V10/77 ,  G06V10/50 ,  G06V10/74 ,  G06V10/774 ,  G06V10/82

CPC classification number: G06V10/7715 ,  G06V10/50 ,  G06V10/761 ,  G06V10/774 ,  G06V10/82

Abstract: A processor-implemented method includes: determining distances between an input vector and center vectors comprised in a plurality of output nodes comprised in a trained codebook; and outputting a first feature vector of the input vector based on the distances between the center vectors and the input vector, wherein the trained codebook is trained by: determining a distance between a training input vector and the center vector for each of the output nodes; determining, among the plurality of output nodes, a best matched unit (BMU) in which a distance between the training input vector and the center vector of the BMU is minimized; and training the codebook by updating the center vector of the BMU, based on the distance between the training input vector and the center vector of the BMU.

公开(公告)号：US20240241691A1

公开(公告)日：2024-07-18

申请号：US18524520

申请日：2023-11-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Woo SHIN ,  Soon-Wan KWON ,  Seijoon KIM ,  Hyunsoo KIM ,  Seungkeun YOON

IPC: G06F5/01

CPC classification number: G06F5/01

Abstract: An electronic device and method with data scaling is provided herein. The electronic device may include a computing device that includes an analog computing circuit, where the computing device may scale an input of the analog computing circuit using a first scaling factor and/or scale a weight of the analog computing circuit using a second scaling factor, where the input includes a plurality of input values within a preset input maximum range of values of the computing device, and the weight includes a plurality of weight values within a preset weight maximum range of values of the computing device, and rescale an output of the analog computing circuit based on the first scaling factor and/or the second scaling factor. The first and second scaling factors may respectively scale values of the input and the weight to exceed respective preset maximum ranges of values.

公开(公告)号：US20220083847A1

公开(公告)日：2022-03-17

申请号：US17230331

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungroh YOON ,  Hyeokjun CHOE ,  Seongsik PARK ,  Seijoon KIM

IPC: G06N3/063 ,  G06F12/10 ,  G06F9/50

Abstract: A method of operating a storage device including a neural network processor includes outputting, by a controller device, a trigger signal instructing the neural network processor to perform a neural network operation in response to a command from a host device, requesting, by a neural network processor, target model data about parameters of a target model and instruction data for instructing the neural network operation to a memory device storing the target model data and the instruction data in response to the trigger signal, receiving, by the neural network processor, the target model data and the instruction data from the memory device and outputting, by the neural network processor, inference data based on the target model data and the instruction data.

公开(公告)号：US20240078785A1

公开(公告)日：2024-03-07

申请号：US18116602

申请日：2023-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minyoung MUN ,  Seijoon KIM

IPC: G06V10/74 ,  G06V10/764

CPC classification number: G06V10/761 ,  G06V10/764

Abstract: A method generates an anchor image embedding vector for an anchor image using an image representation model, determine first similarities between the anchor image and negative samples of the anchor image using first image embedding vectors for the negative samples and the generated anchor image embedding vector, determine second similarities between the anchor image and positive samples of the anchor image using second image embedding vectors for the positive samples and the generated anchor image embedding vector, obtain one of a vector corresponding to a label of the anchor image and third similarities between the label of the anchor image and labels of the negative samples, determine a loss value for the anchor image based on the determined first similarities, and the determined second similarities, and one of the obtained third similarities and a fourth similarity.

公开(公告)号：US20230259750A1

公开(公告)日：2023-08-17

申请号：US18310008

申请日：2023-05-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungroh YOON ,  Hyeokjun CHOE ,  Seongsik PARK ,  Seijoon KIM

IPC: G06N3/063 ,  G06F9/50 ,  G06F12/10

CPC classification number: G06N3/063 ,  G06F9/5061 ,  G06F9/5016 ,  G06F12/10

Abstract: A method of operating a storage device including a neural network processor includes outputting, by a controller device, a trigger signal instructing the neural network processor to perform a neural network operation in response to a command from a host device, requesting, by a neural network processor, target model data about parameters of a target model and instruction data for instructing the neural network operation to a memory device storing the target model data and the instruction data in response to the trigger signal, receiving, by the neural network processor, the target model data and the instruction data from the memory device and outputting, by the neural network processor, inference data based on the target model data and the instruction data.