公开(公告)号：US20240332221A1

公开(公告)日：2024-10-03

申请号：US18422406

申请日：2024-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungyoung AHN ,  Seonghi LEE ,  Hyunwoong KIM ,  Jiseong KIM

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H10B80/00

CPC classification number: H01L23/64 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0652 ,  H01L25/0657 ,  H10B80/00 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1703 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1435

Abstract: A semiconductor package includes a package substrate, an interposer die disposed on the package substrate, semiconductor chips disposed on the interposer die and electrically connected to the package substrate via the interposer die, first connection bumps electrically connecting the semiconductor chips to the interposer die, second connection bumps electrically connecting the interposer die to the package substrate, and third connection bumps disposed below the package substrate, wherein the interposer die includes spiral matching structures adjacent to upper portions of the second connection bumps, and the package substrate includes trace-shaped matching structures adjacent to lower portions of the second connection bumps.