公开(公告)号：US20170345712A1

公开(公告)日：2017-11-30

申请号：US15589169

申请日：2017-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-ki MIN ,  Koung-min RYU ,  Sung-soo KIM ,  Sang-koo KANG

IPC: H01L21/768 ,  H01L21/8238 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L21/76828 ,  H01L21/02164 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76837 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/82385 ,  H01L29/42376 ,  H01L29/66545 ,  H01L29/785

Abstract: A method of manufacturing a semiconductor device includes forming first and second pattern structures on first and second regions of a substrate, respectively, forming a preparatory first interlayer insulating layer covering the first pattern structure on the first region, forming a preparatory second interlayer insulating layer covering the second pattern structure on the second region, the preparatory second interlayer insulating layer including a first colloid, and converting the preparatory first and second interlayer insulating layers into first and second interlayer insulating layers, respectively, by annealing the preparatory first and second interlayer insulating layers.